Data Sheet
Copyright © Bridgetek Pte Ltd 16
BT81X (815/6) Advanced Embedded Video Engine Datasheet
Version 1.0
Document No.: BRT_000220 Clearance No.: BRT#126
1st Byte
2nd byte
3rd byte
Command
Description
01000010b
00000000b
00000000b
42h
SLEEP
Put BT815/6 core to sleep mode. Clock gate
off, PLL and Oscillator off. ACTIVE command
to wake up.
01000011b
01010000b
00000000b
00000000b
43h/50h
PWRDOWN
Switch off 1.2V core voltage to the digital
core circuits. Clock, PLL and Oscillator off.
SPI is alive. ACTIVE command to wake up.
Clock and Reset
01000100b
00000000b
00000000b
44h
CLKEXT
Select PLL input from external crystal
oscillator or external input clock. No effect if
external clock is already selected, otherwise
a system reset will be generated
01001000b
00000000b
00000000b
48h
CLKINT
Select PLL input from internal relaxation
oscillator (default). No effect if internal clock
is already selected, otherwise a system
reset will be generated
01100001b
01100010b
xx
00000000b
61h/62h
CLKSEL
Select the system clock frequency. Note
that software shall also update the register
value for REG_FREQUENCY to align with
system clock selected.
This command will only be effective when
the PLL is stopped (SLEEP mode).
For compatibility to FT800/FT801, set Byte2
to 0x00. This will set the PLL clock back to
default (60 MHz).
Byte2
[5:0]
sets the clock frequency
0
Set to default clock speed
1
Reserved
2 to 6
2 to 6 times the osc
frequency (i.e. 24 to 72MHz
with 12MHz oscillator)
Byte2
[7:6]
sets the PLL range
0
When Byte2[5:0] = 0, 2, 3
1
When Byte2[5:0] = 4, 5, 6
01101000b
00000000b
00000000b
68h
RST_PULSE
Send reset pulse to BT815/6 core. The
behaviour is the same as POR except that
settings done through SPI commands will
not be affected
Configuration
01110000b
xx
00000000b
70h
PINDRIVE
This will set the drive strength for various
pins. For FT800/FT801 compatibility, by
default those settings are from the GPIO
registers. BT815/6 supports setting the
drive strength via SPI command instead.
When PINDRIVE for a pin from the SPI
command is not updated, the drive strength