Data Sheet

Copyright © Bridgetek Pte Ltd 40
BT81X (815/6) Advanced Embedded Video Engine Datasheet
Version 1.0
Document No.: BRT_000220 Clearance No.: BRT#126
From the SLEEP state, the host MPU sends an SPI ACTIVE command to wake the BT815/6 into the
ACTIVE state. The host needs to wait for at least 20ms before accessing any registers or commands. This
is to guarantee the clock oscillator and PLL are up and stable.
From the STANDBY state, the host MPU sends SPI ACTIVE command to wake the BT815/6 into the
ACTIVE state. The host can immediately access any register or command.
4.9.4 Reset and Boot-up Sequence
There are a few hardware and software reset events which can be triggered to reset the BT815/6.
Hardware reset events:
 Power-on-Reset(POR)
 Toggle the PD_N pin
Software reset events:
 SPI command RST_PULSE
 SPI command to switch between the internal clock and the external clock
 SPI command to enter POWERDOWN then wakeup
After reset the BT815/6 will be in the SLEEP state. Upon receiving the SPI ACTIVE command (or CLKEXT
followed by SPI ACTIVE command if external clock source is used), the clock oscillator and PLL will start
up. Once the clock is stable, the chip will check and repair its internal RAM, running the configuration and
release the clock to the system. The chip will exit the reset and boot-up state and enter into normal
operations. The boot-up may take up to 300ms to complete. During boot up process, software should not
access BT815/6 register or RAM.
4.9.5 Pin Status at Different Power States
The BT815/6 pin status depends on the power state of the chip. See the following table for more details.
At the power transition from ACTIVE to STANDBY or ACTIVE to SLEEP, all pins retain their previous
status. The software needs to set AUDIO_L, BACKLIGHT to a known state before issuing power transition
commands.
The pin status in the power down state can be changed by SPI command PIN_PD_STATE.
Pin Name
Default Drive
Reset
Normal
Power Down
(Default)
AUDIO_L
20mA
Out, Float
Out
Retain
SCK
-
In
In
In
MISO
5mA
Out, Float
(CS_N = 1)
IO
Out, Float
MOSI
5mA
In
IO
In
CS_N
-
In
In
In
IO2
GPIO0
5mA
5mA
In
In
IO
IO
Float
Float
IO3
GPIO1
5mA
5mA
In
In
IO
IO
Float
Float
GPIO2
5mA
In
IO
Float