Data Sheet

Copyright © Bridgetek Pte Ltd 44
BT81X (815/6) Advanced Embedded Video Engine Datasheet
Version 1.0
Document No.: BRT_000220 Clearance No.: BRT#126
Address
(hex)
Register Name
Bit
s
r/
w
Reset
value
Description
30208Ch
REG_PLAY
1
r/w
0h
Start effect playback
302090h
REG_GPIO_DIR
8
r/w
80h
Legacy GPIO pin direction,
0 = input , 1 = output
302094h
REG_GPIO
8
r/w
00h
Legacy GPIO read/write
302098h
REG_GPIOX_DIR
16
r/w
8000h
Extended GPIO pin direction,
0 = input , 1 = output
30209Ch
REG_GPIOX
16
r/w
0080h
Extended GPIO read/write
3020A0h-
3020A4h
Reserved
-
-
-
Reserved
3020A8h
REG_INT_FLAGS
8
r/o
00h
Interrupt flags, clear by read
3020Ach
REG_INT_EN
1
r/w
0
Global interrupt enable, 1=enable
3020B0h
REG_INT_MASK
8
r/w
FFh
Individual interrupt enable, 1=enable
3020B4h
REG_PLAYBACK_START
20
r/w
0
Audio playback RAM start address
3020B8h
REG_PLAYBACK_LENGTH
20
r/w
0
Audio playback sample length (bytes)
3020BCh
REG_PLAYBACK_READPTR
20
r/o
-
Audio playback current read pointer
3020C0h
REG_PLAYBACK_FREQ
16
r/w
8000
Audio playback sampling frequency (Hz)
3020C4h
REG_PLAYBACK_FORMAT
2
r/w
0
Audio playback format
3020C8h
REG_PLAYBACK_LOOP
1
r/w
0
Audio playback loop enable
3020CCh
REG_PLAYBACK_PLAY
1
r/w
0
Start audio playback
3020D0h
REG_PWM_HZ
14
r/w
250
BACKLIGHT PWM output frequency (Hz)
3020D4h
REG_PWM_DUTY
8
r/w
128
BACKLIGHT PWM output duty cycle
0=0%, 128=100%
3020D8h
REG_MACRO_0
32
r/w
0
Display list macro command 0
3020DCh
REG_MACRO_1
32
r/w
0
Display list macro command 1
3020E0h –
3020F4h
Reserved
-
-
-
Reserved
3020F8h
REG_CMD_READ
12
r/w
0
Command buffer read pointer
3020FCh
REG_CMD_WRITE
12
r/o
0
Command buffer write pointer
302100h
REG_CMD_DL
13
r/w
0
Command display list offset
302104h
REG_TOUCH_MODE
2
r/w
3
Touch-screen sampling mode
302108h
REG_TOUCH_ADC_MODE
REG_CTOUCH_EXTENDED
1
r/w
1
Set Touch ADC mode
Set capacitive touch operation mode: