User`s guide

User's Guide ADI-192 DD © RME

10.2 Outputs

AES/EBU

• 4 x XLR, transformer balanced, ground-free, according to AES3-1992

• Output voltage Professional 4.5 Vpp, Consumer 2.1 Vpp

• Format Professional according to AES3-1992 Amendment 4

• Format Consumer (SPDIF) according to IEC 60958

• Single Wire: 4 x 2 channels 24 bit, up to 192 kHz

• Double Wire: 4 x 2 channels 24 bit 96 kHz, equalling 4 channels 192 kHz

• Double Wire: 4 x 2 channels 24 bit 48 kHz, equalling 4 channels 96 kHz

• Quad Wire: 4 x 2 channels 24 bit 48 kHz, equalling 2 channels 192 kHz

SPDIF (Front)

• as AES/EBU, but connected via TOSLINK

• Format Consumer (SPDIF) according to IEC 60958

• Audio signal from AES/EBU channels 1/2

ADAT Optical

• 2 x TOSLINK

• Standard: 8 channels 24 bit, up to 48 kHz

• S/MUX: 2 x 8 channels 24 bit / 48 kHz, equalling 8 channels 24 bit 96 kHz

• S/MUX4: 2 x 8 channels 24 bit / 48 kHz, equalling 4 channels 24 bit 192 kHz

TDIF

• 2 x D-sub 25 pin, according to TDIF-1

• Standard: 8 channels 24 bit, up to 48 kHz

• Double Wire: 2 x 8 channels 24 bit / 48 kHz, equalling 8 channels 24 bit 96 kHz

• Quad Wire: 2 x 8 channels 24 bit / 48 kHz, equalling 4 channels 24 bit 192 kHz

Word Clock

• BNC

• Max. output voltage: 5 Vpp

• Output voltage @ 75 Ohm: 4.0 Vpp

• Impedance: 10 Ohm

• Frequency range STD: 28 kHz – 220 kHz

• Frequency range TDIF: 28 kHz – 54 kHz

10.3 Digital

• Clocks: Internal, AES/EBU In, ADAT In, Word In, TOSLINK In, TDIF In

• Internal sample rates: 44.1 / 48 / 88.2 / 96 / 176.4 / 192 kHz

• Low Jitter Design: < 1 ns in PLL mode, all inputs

• Internal clock: 800 ps Jitter, Random Spread Spectrum

• Jitter suppression of external clocks: > 30 dB (2.4 kHz)

• PLL ensures zero dropout, even at more than 100 ns jitter

• Digital Bitclock PLL for trouble-free varispeed ADAT operation

• Group delay: typically 3 samples