User guide

A–B
15
Chapter
15–1
Instruction Set Overview
This chapter:
• takes a brief look at the instruction set
• lists the name, mnemonic, and function of each instruction
• points out the instructions that can be used only with SLC 5/02 processors
Important: To avoid misapplication, do not apply any of the instructions
until you have read the detailed descriptions in chapters 16
through 26.
On page 15–9 you will find an Instruction Locator. This is a list of the
instruction mnemonics, in alphabetical order, with page references.
The instruction set is divided into the classifications named in chapters 16
through 26. A brief description of the individual instructions in each
classification follows.
Bit Instructions – Chapter 16
Instruction Name
and Mnemonic
5/02
Only
•
Function – Conditional (Input) or Output
Instructions as Noted
Examine if Closed XIC Conditional instruction. True when bit is on (1).
Examine if Open XIO Conditional instruction. True when bit is off (0).
One–Shot Rising OSR Conditional instruction. Makes rung true for one scan
upon each false-to-true transition of conditions
preceding it in the rung.
Output Energize OTE Output instruction. True (1) when conditions preceding
it are true. Goes false when conditions preceding it go
false.
Output Latch OTL Output instruction. Addressed bit goes true (1) when
conditions preceding the OTL instruction are true.
When conditions go false, OTL remains true until rung
containing OTU instruction with same address goes
true.
Output Unlatch OTU Output instruction. Addressed bit goes false (0) when
conditions preceding the OTU instruction are true.
Remains false until rung containing OTL instruction with
same address goes true.
Instruction Classifications