User guide

AB
20
Chapter
201
Math Instructions
This chapter covers output instructions that allow you to perform
computation and math operations on individual words.
Instructions for use with fixed, SLC 5/01, and SLC 5/02 processors:
Add (ADD)
Subtract (SUB)
Multiply (MUL)
Divide (DIV)
Double Divide (DDV)
Negate (NEG)
Clear (CLR)
Convert to BCD (TOD)
Convert from BCD (FRD)
Decode (DCD)
Instructions for use with SLC 5/02 processors only:
Square Root (SQR)
Scale (SCL)
Application techniques possible with Series C and later SLC 5/02 processors:
32-bit addition and subtraction
All application examples shown are in the HHT zoom display.
The following general information applies to math instructions.
Entering Parameters
Source address(es) of the value(s) on which the mathematical, logical,
or move operation is to be performed; can be word addresses or program
constants. An instruction that has two source operands will not accept
program constants in both operands.
Destination the address (destination) of the result of the operation.
Signed integers are stored in twos complementary form. Refer to appendix
B for more information regarding twos complement form.
Math Instructions Overview