User guide

Chapter 20
Math Instructions
203
Add ADD Output Instruction
ADD
ADD
Source A N7:0
879
Source B N7:1
2150
Dest N7:2
3029
(ADD)
F1 F2 F3 F4 F5
ZOOM on ADD (ADD) 2.3.0.0.2
NAME: ADD
SOURCE A: N7:0 879
SOURCE B: N7:1 2150
DEST: N7:2 3029
EDT_DAT
HHT Ladder Display:
HHT Zoom Display:
Ladder Diagrams and APS Displays:
(online monitor mode)
The value at source A is added to the value at source B and then stored in the
destination.
Using Arithmetic Status Bits
C set if carry is generated; otherwise reset
V set if overflow is detected at destination; otherwise reset. On overflow,
the minor error flag (S:5/0) is also set. The value 32,768 or 32,767 is
placed in the destination. Exception: If you are using a Series C or later
SLC 5/02 processor and have the Math Overflow Selection Bit S:2/14 set,
then the unsigned, truncated overflow remains in the destination.
Z set if the result is zero; otherwise reset
S set if the result is negative; otherwise reset
Math Register
Contents unchanged.
Add (ADD)