User guide

A–B
21
Chapter
21–1
Move and Logical Instructions
This chapter covers output instructions that allow you to perform move and
logical operations on individual words. Use these instructions with fixed,
SLC 5/01 and SLC 5/02 processors:
• Move (MOV)
• Masked Move (MVM)
• And (AND)
• Inclusive Or (OR)
• Exclusive Or (XOR)
• Not (NOT)
All application examples shown are in the HHT zoom display.
The following general information applies to move and logical instructions.
Entering Parameters
• Source – This is the address of the value on which the logical or move
operation is to be performed. It can be a word address or a program
constant. If the instruction has two source operands, it will not accept
program constants in both operands.
• Destination – This is the address of the result of the move or logical
operation. It must be a word address.
Indexed Word Addresses
With SLC 5/02 processors, you have the option of using indexed word
addresses for instruction parameters specifying word addresses. Indexed
addressing is discussed in chapter 4.
Using Arithmetic Status Bits
After an instruction is executed, the arithmetic status bits in the status file are
updated:
• Carry (C), S:0/0 – Set if a carry is generated; otherwise cleared.
• Overflow (V), S:0/1 – Indicates that the actual result of a math instruction
does not fit in the designated destination.
• Zero (Z), S:0/2 – Indicates a 0 value after a math, move or logic
instruction.
• Sign (S), S:0/3 – Indicates a negative (less than 0) value after a math,
move or logic instruction.
Move and Logical Instructions
Overview