Instruction Manual
Table Of Contents
- S-3056-1 Distributed Power System SA3100 Drive Configuration and Programming Instruction Manual
- Important User Information
- Contents
- List of Figures
- List of Tables
- Chapter 1 Introduction
- Chapter 2 Configuring the UDC Module, Regulator Type, and Parameters
- 2.1 Adding a Universal Drive Controller (UDC) Module
- 2.2 Entering the Drive Parameters
- 2.3 Configuring the Vector with Constant Power Regulator
- 2.4 Configuring the Volts per Hertz (V/Hz) Regulator
- 2.5 Configuring Flex I/O
- 2.6 Generating Drive Parameter Files and Printing Drive Parameters
- Chapter 3 Configuring the UDC Module’s Registers
- 3.1 Register and Bit Reference Conventions Used in this Manual
- 3.2 Flex I/O Port Registers (Registers 0-23)
- 3.3 UDC/PMI Communication Status Registers (Registers 80-89/1080-1089)
- 3.4 Command Registers (Registers 100-199/1100-1199)
- 3.5 Feedback Registers (Registers 200-299/1200-1299)
- 3.6 Application Registers (Registers 300-599, Every Scan) (Registers 1300-1599, Every Nth Scan)
- 3.7 UDC Module Test I/O Registers (Registers 1000-1017)
- 3.8 Interrupt Status and Control Registers (Registers 2000-2047)
- Chapter 4 Application Programming for DPS Drive Control
- Chapter 5 On-Line Operation
- Appendix A SA3100 Vector Regulator Register Reference
- Appendix B SA3100 Volts / Hertz Regulator Register Reference
- Appendix C SA3100 Local Tunable Variables
- Appendix D Vector with Constant Power Regulator
- Appendix E Volts per Hertz (V/Hz) Regulator
- Appendix F Status of Data in the AutoMax Rack After a STOP_ALL Command or STOP_ALL Fault
- Appendix G Torque Overload Ratio Parameter Precautions
- Appendix H Default Carrier Frequency and Carrier Frequency Limit for Drive Horsepower Ranges
- Appendix I Vector with Constant Power Parameter Entry Example
- Index
3-62
SA3100 Drive Configuration and Programming
Interrupt Status Control Registers (Continued) 2000
CCLK Counting Bit 5
Hex Value: 0010H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
Enable CCLK on the Multibus Backplane Bit 6
CCLK must be enabled in the rack for the
UDC module to execute its task(s) and
communicate synchronously with the PMI.
Hex Value: 0001H
Sug. Var. Name: N/A
Access: Read/Write
UDC Error Code: N/A
LED: N/A
Only one module per rack should enable CCLK. If CCLK is enabled on multiple
modules in the rack, an overlap error will result (error code 38). Other modules that
can enable CCLK include the M/N 57C409, 57C421, and the 57C411.
The UDC module uses CCLK to determine when it should run its tasks. CCLK is
also used as the time reference for all UDC modules in the rack so that they are all
synchronized to start at specific time periods. If interrupts to the AutoMax
Processor are required, register 2001 must be set to the desired value before CCLK
is enabled.
Interrupt Enabled Bit 7
The Interrupt Enabled bit, when set by the
operating system, indicates that a hardware
EVENT has been defined in an AutoMax
task.
Hex Value: 0001H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A
No other programming is required for the UDC operating system to generate an
interrupt in the interval defined in register 2001.
Interrupt Status Bit 15
The Interrupt Status bit is set to indicate that
an interrupt is being generated at this time.
Hex Value: 0001H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED: N/A