Instruction Manual
Table Of Contents
- S-3056-1 Distributed Power System SA3100 Drive Configuration and Programming Instruction Manual
- Important User Information
- Contents
- List of Figures
- List of Tables
- Chapter 1 Introduction
- Chapter 2 Configuring the UDC Module, Regulator Type, and Parameters
- 2.1 Adding a Universal Drive Controller (UDC) Module
- 2.2 Entering the Drive Parameters
- 2.3 Configuring the Vector with Constant Power Regulator
- 2.4 Configuring the Volts per Hertz (V/Hz) Regulator
- 2.5 Configuring Flex I/O
- 2.6 Generating Drive Parameter Files and Printing Drive Parameters
- Chapter 3 Configuring the UDC Module’s Registers
- 3.1 Register and Bit Reference Conventions Used in this Manual
- 3.2 Flex I/O Port Registers (Registers 0-23)
- 3.3 UDC/PMI Communication Status Registers (Registers 80-89/1080-1089)
- 3.4 Command Registers (Registers 100-199/1100-1199)
- 3.5 Feedback Registers (Registers 200-299/1200-1299)
- 3.6 Application Registers (Registers 300-599, Every Scan) (Registers 1300-1599, Every Nth Scan)
- 3.7 UDC Module Test I/O Registers (Registers 1000-1017)
- 3.8 Interrupt Status and Control Registers (Registers 2000-2047)
- Chapter 4 Application Programming for DPS Drive Control
- Chapter 5 On-Line Operation
- Appendix A SA3100 Vector Regulator Register Reference
- Appendix B SA3100 Volts / Hertz Regulator Register Reference
- Appendix C SA3100 Local Tunable Variables
- Appendix D Vector with Constant Power Regulator
- Appendix E Volts per Hertz (V/Hz) Regulator
- Appendix F Status of Data in the AutoMax Rack After a STOP_ALL Command or STOP_ALL Fault
- Appendix G Torque Overload Ratio Parameter Precautions
- Appendix H Default Carrier Frequency and Carrier Frequency Limit for Drive Horsepower Ranges
- Appendix I Vector with Constant Power Parameter Entry Example
- Index
Configuring the UDC Module’s Registers
3-21
Drive Control Register (Continued) 100/1100
Synchronous Transfer Request* Bit 7
*Reserved for future use.
The application task sets the Synchronous
Transfer Request bit to begin matching the
Voltage, Period, and Phase of the drive’s
PWM output to an external source.
Hex Value: 0080H
Sug. Var. Name: SX_REQ@
Access: Read/Write
UDC Error Code: N/A
LED: N/A
When synchronization is ready, register 200, bit 7 (SYN_OK@) is turned on to
indicate that the synchronous transfer may be done.
Fault Reset Bit 8
The Fault Reset bit is set and reset to clear
the Drive Fault register 202/1202. After a
drive fault is latched, the Drive Fault register
must be cleared before the drive can be re-
started.
Hex Value: 0100H
Sug. Var. Name: FLT_RST@
Access: Read/Write
UDC Error Code: N/A
LED: N/A
To clear the Drive Fault register any command bits that have been set in the Drive
Control register (100/1100) must first be turned off. Once the cause of the fault has
been corrected, the Fault Reset bit must be turned on and then off again. The Fault
Reset bit will clear the entire Drive Fault register. Then the desired command bits
may be turned on again.
The Fault Reset bit is edge-sensitive, i.e., leaving it set will not clear the fault register
continuously. Note that if the fault condition still exists after register 202/1202 is
cleared, it will continue to trigger drive faults until the problem has been corrected.
Warning Reset Bit 9
The Warning Reset bit is set and reset to
clear the Drive Warning register
203/1203. This bit is edge-sensitive, i.e.,
leaving it set will not clear the warning
register continuously.
Hex Value: 0200H
Sug. Var. Name: WRN_RST@
Access: Read/Write
UDC Error Code: N/A
LED: N/A
Bit 10
Reserved for future use.
Hex Value: 0400H
Sug. Var. Name:
Access: Read only
UDC Error Code: N/A
LED: N/A