Distributed Power System SA3100 Power Module Interface (PMI) Regulator Instruction Manual S-3057-1
Throughout this manual, the following notes are used to alert you to safety considerations: ! ATTENTION: Identifies information about practices or circumstances that can lead to personal injury or death, property damage, or economic loss. Important: Identifies information that is critical for successful application and understanding of the product.
CONTENTS Chapter 1 Introduction Chapter 2 PMI Regulator Motherboard 2.1 Motherboard Mechanical Description .............................................................. 2-1 2.1.1 Fiber-Optic Ports ................................................................................... 2-1 2.1.2 Power Module Interface Connector....................................................... 2-2 2.1.3 Flex I/O Interface................................................................................... 2-2 2.1.
II Chapter 5 Installation Guidelines 5.1 Wiring Guidelines .............................................................................................5-1 5.2 PMI Regulator Motherboard Connections........................................................5-1 5.2.1 Fiber-Optic Cabling................................................................................5-2 5.2.2 Meter Port Wiring...................................................................................5-2 5.2.
Appendix A PMI Regulator Specifications ................................................................................A-1 Appendix B Resolver & Drive I/O Board Specifications ..........................................................B-1 Appendix C PMI Regulator / UDC Register Cross-Reference..................................................C-1 Appendix D PMI Regulator Replacement Parts ........................................................................D-1 Appendix E PMI Regulator Test Points ........
IV SA3100 Drive Configuration and Programming
List of Figures Figure 1.1 – PMI Regulator Assembly ...................................................................... 1-5 Figure 2.1 – PMI Regulator Motherboard ................................................................. 2-1 Figure 2.2 – Meter Port Output Circuit...................................................................... 2-3 Figure 2.3 – LED Status Indicators........................................................................... 2-3 Figure 2.4 – PMI Processor Block Diagram.........
VI PMI Regulator
List of Tables Table 1.1 – SA3100 Documentation (Binder S-3053) .............................................. 1-2 Table 1.2 – SA3100 Power Structure Service Manual Cross Reference ................. 1-2 Table 4.1 – Supported Flex I/O Modules .................................................................. 4-2 Table 5.1 – Standard Resolver Connections ............................................................ 5-7 Table 5.2 – Resolver Cables ................................................................
VIII PMI Regulator
CHAPTER 1 Introduction Rockwell SA3100 AC drives operate under the control of the AutoMax™ Distributed Power System (DPS). DPS is a programmable microprocessor-based control system that provides real-time control of AC and DC drives. Each Universal Drive Controller (UDC) module in the AutoMax rack is used to control one or two drives. Both AC and DC drives can be controlled from one UDC module. The UDC module communicates over a fiber-optic link with the drive’s Power Module Interface (PMI) Regulator.
Table 1.
Table 1.2 – SA3100 Power Structure Service Manual Cross Reference AC Input Voltage DC Bus Input Voltage Nominal HP Frame Size Use Service Manual 1336 Force- B 6.11 C 6.12 D 6.13 E 6.14 F 6.14 G 6.15 H 6.
Table 1.2 – SA3100 Power Structure Service Manual Cross Reference AC Input Voltage DC Bus Input Voltage Nominal HP Frame Size Use Service Manual 1336 Force- B 6.11 C 6.12 D 6.13 E 6.14 F 6.16 G 6.15 H 6.
PE Figure 1.
1-6 PMI Regulator
CHAPTER 2 PMI Regulator Motherboard The motherboard on the PMI Regulator (figure 2.1) contains the PMI processor and AC power technology circuits. The PMI processor runs the motor control algorithm, monitors drive operation, and communicates with the AutoMax UDC module over the fiber-optic link. The AC power technology circuit provides the gate firing signals to the drive’s power devices and receives and conditions the power device feedback signals. Figure 2.1 – PMI Regulator Motherboard 2.
2.1.2 Power Module Interface Connector The 50-pin Power Module Interface connector is used for drive feedback signals as well as for gate firing, power supply, and pre-charge contactor control signals. The connector and signals are described in detail in section 2.2.3. 2.1.3 Flex I/O Interface The Flex I/O interface provides the hardware connection between the PMI processor and the Flex I/O modules that may be used to read and write analog and digital data to or from external devices.
FERRITE BEAD METER OUTPUT PORT 100pF OFFSET VOLTAGE + + - 51.1 20K 20K 1 0.01uF COM AGND 100pF + + - 51.1 20K 20K 0.01uF 2 COM D/A CONVERTER AGND 100pF + + - 51.1 20K 20K 0.01uF 3 COM AGND 100pF + + 20K 51.1 20K 0.01uF 4 COM AGND AGND Figure 2.2 – Meter Port Output Circuit 2.1.5 Synchronous Transfer Port Connector The Synchronous Transfer Port connector is reserved for future use of the synchronous transfer function.
PMI PROCESSOR AND DRIVE STATUS LEDs OK (green) - When power is applied, this LED will turn on to indicate the PMI processor has passed its internal power-up diagnostics. After power-up, this LED will remain on while the Regulator is operating properly. It will turn off if an internal watchdog times out COMM OK (green) - When lit, this LED indicates messages are being received correctly over the fiber-optic link from the UDC module.
P.M. FLT (red) - When lit, this LED indicates that one of the hardware fault conditions listed below has been detected in the Power Module: • DC bus overcurrent fault. The hardware detects that DC bus current exceeds 125% of the rated Power Module current. Corresponding UDC location: Register 202/1202, bit 1 • Instantaneous overcurrent fault (IET). An overcurrent is detected in one of the power devices. Register 204/1204 indicates which power device detected the overcurrent.
EXT FLT (red) - • Charge bus time-out fault. (Note that the P.M. FLT LED will also be on.) This fault indicates one of the following conditions: (continued) • The DC bus is not fully charged within 10 seconds after the bus enable bit (register 100/1100, bit 4) is turned on. • The drive is on and feedback indicates that the precharge contactor has opened. • DC bus voltage is less than the value stored in the Power Loss Fault Threshold (PLT_EO%) tunable variable.
RPI (green) - When lit, this LED indicates that the run permissive input (RPI) signal is detected on pin A. The RPI signal typically originates from the drive’s coast-to-rest stop circuit. Corresponding bit location: Register 201/1201, bit 0. MCR (amber) - When lit, this LED indicates the MCR (motor control relay) output signal is being driven on (pin P). The MCR output is under the control of the PMI Regulator.
If any of these diagnostics fails, the DRV RDY LED will not turn on. If the diagnostics pass, the PMI processor will send a feedback message to the UDC module. The UDC module will respond with a command message and the configuration data. The configuration data contains the synchronization information for the PMI Regulator.
Figure 2.4 – PMI Processor Block Diagram PMI Regulator Motherboard 2-9 5V MONITOR 32 Mhz 16 Mhz 4 Mhz CLOCK SUBSYSTEM INTERRUPTS INTERNAL BACKPLANE INTERFACE SYSTEM-WIDE RESET PRODUCTION TEST PORT 4 Mhz RATE 1 - 65536 PRELOAD CCLK COUNTER CCLK CNTR SLOTS COMMUNICATIONS 26-PIN CONN. BUS REQ. RUPT INTER- COMM. DMA/PROC.
2.2.2 AC Power Technology Circuit The AC power technology circuit provides the gate firing signals to control the six power devices in the AC Power Module. This circuit compares the flux current and torque current reference values received from the PMI processor to feedback data received from the Power Module to perform the calculations required to generate the pulse-width-modulated (PWM) signals that fire the gates in the AC Power Module.
Figure 2.
2.2.3 Power Module Interface Connector Signals The 50-pin Power Module Interface connector is used for drive feedback signals as well as for gate firing, power supply, and pre-charge contactor control signals. Figure 2.6 shows the pinout for the Power Module Interface connector. The signals are described in the following sections.
2.2.3.1 Digital Grounds Pin 1: DGND Pin 2: DGND Pin 3: DGND Pin 4: DGND Pin 24: DGND Pin 47: DGND Pin 48: DGND 2.2.3.
Circuitry on the PMI Regulator converts the current feedback from three-phase sinusoidal currents (Iu, Iw) to DC quadrature torque (Id) and flux (Iq) currents. The AC-to-DC hardware conversion eliminates the need for the PMI processor software to do this calculation. The maximum rated current will result in a 2.5 volt (peak) feedback signal. A 5 volt feedback signal indicates an instantaneous overcurrent fault (IET). Bit 3 of Drive Fault register 202/1202 will be set if an overcurrent fault is detected.
The system also warns of a DC bus undervoltage condition if the DC bus voltage drops below the value of local tunable UVT_E0%. The system will set bit 1 in the Drive Warning register (203/1203) if an undervoltage condition is detected. A drive fault is generated (register 202/1202, bit 6) and the drive is shut down if the DC bus voltage drops below the value stored in the Power Loss Fault Threshold local tunable (PLT_E0%).
2.2.3.9 DC Bus Pre-Charge Pin 31: /CHARGE Pre-charge Enable The DC bus pre-charge enable signal is used to control the phase advance SCRs in large AC input units to limit the rate of charge on the bus capacitors. This signal is also used to close the pre-charge contactor (SCR) when the bus voltage is greater than the undervoltage threshold level and has reached a steady state. 0V commands the pre-charge to close. +5V commands the pre-charge to open. 2.2.3.
2.2.4 Synchronous Transfer Port ! ATTENTION: Do not connect anything to pins 1, 2, 3, 5, and 6 of the Synchronous Transfer Connector. Connecting to these pins could result in improper system operation. Failure to observe this precaution could result in damage to equipment and bodily injury. The synchronous transfer port is reserved for future use of the synchronous transfer function. However, connections may be made to three pins in order to measure realtime current feedback. Figure 2.
2-18 PMI Regulator
CHAPTER 3 Resolver & Drive I/O Board The Resolver & Drive I/O board (B/M O-60067) converts analog sine and cosine resolver feedback signals into digital format for use within the application program. An external strobe input is also provided to permit a user-generated signal to latch the resolver position data. The board self-tunes to compensate for varying lengths and types of resolver wiring. Distributed Power Systems are designed to be used with the standard resolvers described in Appendix B.
The 14-pin Resolver Feedback connector is used to bring the resolver signal into the PMI Regulator. This connector will also accept a signal from an analog tachometer or other analog field device as long as the signal is within the correct voltage range. In addition, there is a 24V digital input that serves as a strobe for latching the resolver position externally. Both a resolver and an analog tachometer may be connected to the board. However, only the resolver can be used for speed feedback.
Reference Out (+) 1 Reference Out (-) Sine Input (+) A 1 Sine Input (-) F Cosine Input (-) 1 K Key Pin N Analog Input (-) R Analog Input Shield B 1 Cosine Input (+) 1 C D 1 E External Strobe Input (+) 1 External Strobe Input (-) 1 H J Not Used L Not Used M Analog Input (+) P 1. These signals are not used on the Drive I/O only (no feedback) board. Figure 3.
The Resolver & Drive I/O board supports two methods of sampling the digital position of the resolver. In the first method, the position is sampled once per UDC task scan at the rate defined in the SCAN_LOOP control block in the UDC task. This block tells the UDC task how often to run based on the CCLK signal on the AutoMax rack backplane. The PMI processor sends the position data to the UDC module immediately before it is needed by the UDC module for the next UDC task scan.
Strobe input detection is enabled by setting bits 8 and/or 9 in UDC register 101/1101. The resolver position can be sampled on the strobe input’s rising edge, falling edge, or both. Latched data is sent to the UDC module immediately before it is needed by the UDC module for the next UDC task scan. Note that the PMI operating system detects only one edge per UDC scan.
The Resolver & Drive I/O board contains circuitry to synchronize the reference waveform to within 10 degrees of the returning waveforms. This synchronization corrects for any phase shift which can occur between the reference and stator signal (i.e., stator signals lagging the reference) and can increase as the cable length increases.
The balance calibration procedure minimizes oscillations that occur due to imbalances between channels by adding capacitance to the sine or cosine channel. The board calculates the capacitance value which yields the smallest velocity variations with sine/cosine magnitudes within 1% of each other. Due to the characteristics of the cable or to noise problems, it is possible that the magnitudes will not be within 1% of each other.
312K 1.04M +12 V ANALOG TO A/D SUBSYSTEM 20K – + ANALOG+ 6800 pF 1.04M AGND -12 V 312K THESE COMPONENTS ARE ON THE PMI BACKPLANE THIS CONNECTION IS MADE CLOSE TO POWER SUPPLY ANALOG SHIELD AGND 10K .1 uF .33 uF DGND AGND Figure 3.7 – Analog Input Circuit 3.2.3 Drive I/O The digital drive I/O operates with 115VAC (50/60Hz) nominal line voltage. All input and output channels have isolated commons with an isolated voltage rating limited to 150VAC.
After any of these events, the PMI processor will wait until it detects that current feedback is less than 2% of rated motor current multiplied by the motor overload ratio. If this current level has not been reached within 300 msec, the PMI processor will turn off the MCR output regardless. If the RPI signal is removed, the MCR output will be turned off and gate power will be removed under hardware control within approximately 0.5 second to provide an additional level of protection.
MCR AND AUX OUTPUTS .0033uF 1K + .1uF DELAYED RPI MICROPROCESSOR 1M – .0033uF Figure 3.10 – MCR and Auxiliary Output Circuit The Drive I/O connector pinout is shown in figure 3.11 RPI IN (+) A B RPI IN (-) AUX IN1/MFDBK (+) C D AUX IN1/MFDBK (-) AUX IN2 (+) E F AUX IN2 (-) AUX IN3 (+) H J AUX IN3 (-) AUX IN4 (+) K L AUX IN4 (-) AUX IN5 (+) M N AUX IN5 (-) MCR OUT (+) P R MCR OUT (-) AUX OUT (+) S T AUX OUT (-) Key Pin U V Not Used Figure 3.
Figure 3.12 – Resolver & Drive I/O Block Diagram Resolver & Drive I/O Board 3-11 BUS AND BUFFER INTERFACE POWER SUPPLY SUBSYSTEM OPEN FUSE DETECTION CONNECTOR BACKPLANE INTERNAL FEEDBACK PHASE 12 BITS +/- 3V SUBSYSTEM ANALOG INPUT REFERENCE INTERNAL Av = 0 TO 255 VELOCITY 72 RPS MAX 14 BITS OUTPUT CLOSURE CONTACT 115 VAC DIGITAL I/O ANALOG INPUT COS SIN RPI TRANSFORMER GAIN AMPLIFIER MCR TIMING RPI / MCR DETECTION AND PHASE AMPLITUDE CIRCUITS CABLE BALANCE 1.
Figure 3.13 – Drive I/O Only Block Diagram 3-12 PMI Regulator INTERNAL BUS AND BUFFER INTERFACE POWER SUPPLY SUBSYSTEM OPEN FUSE DETECTION CONNECTOR BACKPLANE 12 BITS +/- 3V SUBSYSTEM ANALOG INPUT OUTPUT CLOSURE CONTACT 115 VAC DIGITAL I/O ANALOG INPUT ADDRESS / DATA / CONTROL BUS MCR RPI TIMING RPI / MCR AUX IN 1 TO 5 AUX OUT (CONTACT CLOS.) (CONTACT CLOS.
CHAPTER 4 Flex I/O Interface The Flex I/O interface provides the hardware connection between the PMI processor and the Flex I/O modules that are used to read and write analog and digital data to or from external devices. Flex I/O plugs into a terminal base and is mounted on DIN rails. The terminal bases plug into each other to connect and daisy-chain power and communication signals. Module numbering is used to determine where in the UDC memory map the I/O data is placed. Modules 0 and 1 must be digital I/O.
Shown below are two examples of illegal physical location combinations and their module numbering: ILLEGAL COMBINATIONS OF FLEX I/O: Interface Cable Interface Cable MOD 1 MOD 2 MOD 0 MOD 0 MOD 2 DIGITAL I/O ANALOG I/O DIGITAL I/O DIGITAL I/O ANALOG I/O Module 1 will not be read. Module 0 will not be read. The Flex I/O modules supported by the SA3100 PMI Regulator are listed in table 4.1.
4.1 Flex I/O Interface Mechanical Description The Flex I/O interface consists of: • A serial bus master (SERBUS) chip that controls the operation of the Flex I/O module via software commands from a main processor. This IC performs all the controlling functions occurring on the Flex I/O module. It also contains a dual-port memory, which provides both the PMI processor and the Flex I/O modules access to the same memory locations.
4.3 Flex I/O Error Detection The PMI Regulator’s I/O Fault LED (I/O FLT) will light to indicate that communication between Flex I/O and the PMI processor has been disrupted, or that Flex I/O has been configured but is not plugged in. Registers 0-23 in the UDC module are used for Flex I/O configuration and diagnostics. Register 10/22 provides Flex system status, as well as Module 0 and Module 1 status and error codes. Register 11/23 provides Flex Module 2 error codes.
CHAPTER 5 Installation Guidelines ! ATTENTION:Only qualified electrical personnel familiar with the construction and operation of this equipment and the hazards involved should install, adjust, operate, or service this equipment. Read and understand this manual and other applicable manuals in their entirety before proceeding. Failure to observe this precaution could result in severe bodily injury or loss of life.
5.2.1 Fiber-Optic Cabling ! ATTENTION:Turn off, lock out, and tag power to both the rack containing the UDC module and to its corresponding PMI Regulator before viewing the fiber-optic cable or transmitter under magnification. Viewing a powered fiber-optic transmitter or connected cable under magnification may result in damage to the eye. For additional information refer to ANSI publication Z136.1-1981.
5.3 Resolver & Drive I/O Board Connections Two cables are provided with your system for connection to the Resolver Feedback and Drive I/O connectors. The cable part numbers are stamped onto the cables and should be compared to the wiring diagrams shipped with your system. The following sections describe the connections to the Resolver & Drive I/O board. 5.3.
Cable No. 612426-xxxS ANALOG INPUT (+) 1 1 ANALOG INPUT (–) 2 2 SHIELD 3 3 (where xxx is length in inches) 4 5 6 ANALOG REFERENCE OUT (+) 1 1 REFERENCE OUT (–) 2 2 SINE INPUT (+) 3 3 SINE INPUT (–) 4 4 COSINE INPUT (+) 5 5 COSINE INPUT (–) 6 6 EXT. TRIGGER (+) 7 777 EXT.
Cable No. 612570-xxxS (where xxx is length in inches) ANALOG INPUT (+) - UPPER LEVEL 1 ANALOG INPUT (-) - LOWER LEVEL 2 SHIELD 3 ANALOG TERMINAL BLOCKS AND END MOUNTS SHOWN SEPARATED FOR CLARITY REFERENCE OUT (+) - UPPER LEVEL 1 REFERENCE OUT (-) - LOWER LEVEL 2 SINE INPUT (+) - UPPER LEVEL 3 SINE INPUT (-) - LOWER LEVEL 4 COSINE INPUT (+) - UPPER LEVEL 5 RESOLVER COSINE INPUT (-) - LOWER LEVEL 6 EXT. TRIGGER (+) - UPPER LEVEL 7 EXT.
Cable No. 612568-xxxS (where xxx is length in inches) ANALOG INPUT (+) 1 11 ANALOG INPUT (–) 2 2 SHIELD 3 3 ANALOG 4 5 6 WIRE NUMBER WIRE COLOR ANALOG 1 BLK 2 CLEAR 3 DRAIN (SHIELD) Figure 5.4 – Terminal Block Connections for Analog Input Only Cable No. 612569-xxxS (where xxx is length in inches) WIRE NUMBER WIRE COLOR ANALOG 1 BLK 2 CLEAR 3 DRAIN (SHIELD) Figure 5.
5.3.1.1 Resolver Input Connections Standard resolver input connections are shown in table 5.1. Table 5.1 – Standard Resolver Connections Resolver Resolver & Drive I/O Board Connector Pin Resolver Winding 613469-1,-2 800123, 800123-1 800123-2 TB Faceplate Conn Pin Resolver Module Ref. Input R1+ R2– A B 1 2 A B 1 2 A B + – Ref. Output Sine Output S1+ S3– C D 3 4 D F 3 4 D C + – Sine Input Cosine Output S2+ S4– E F 5 6 G E 5 6 F E – + Cosine Input1 7 8 H J + – Ext.
Figure 3.7 in chapter 3 shows the analog input circuit. Note that the input impedance has a finite value of approximately 1.3 megohms. This must be taken into account when connecting to sources with a high output impedance such as an analog tachometer scaling board. Take steps to reduce noise pickup and the possibility of ground loops. In the case of grounded sources, note the common mode voltage limit. Avoid migrating a remote ground into the PMI Regulator. Use the differential connections to reduce noise.
Zout + + Vs G Vs MUST BE LESS THAN 10 VOLTS Figure 5.8 – Analog Input - Single-Ended Floating Zout + Vs + Zout G Vc Vcom Vcom + Vc MUST BE LESS THAN 30 VOLTS Vs MUST BE LESS THAN 10 VOLTS Figure 5.9 – Analog Input - Balanced Driven Off Ground Zout + Vs + Zout G Vcom Vcom MUST BE LESS THAN 30 VOLTS Vs MUST BE LESS THAN 10 VOLTS Figure 5.
Zout + Vs + Zout G Vs MUST BE LESS THAN 10 VOLTS Figure 5.11 – Analog Input - Balanced Floating 5.3.2 Connecting Drive I/O Drive I/O Cable #612401-T is provided for connection between the Drive I/O connector and a 16-point terminal block. Cable #612571-S is provided for connection between the Drive I/O connector and a row of two tier DIN rail mounted terminal blocks. These cables have an 18-pin connector on one end for connection to the Drive I/O Connector.
Cable No.
Cable No. 612571-xxxS (where xxx is length in inches) (TERMINAL BLOCKS AND END MOUNTS SHOWN SEPARATED FOR CLARITY) WIRE NUMBER WIRE COLOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 BRN WHT/BRN RED WHT/RED ORG WHT/ORG YEL WHT/YEL GRN WHT/GRN BLU WHT/BLU VIO WHT/VIO GRY WHT/GRY Figure 5.
CHAPTER 6 Diagnostics and Troubleshooting Operation of the SA3100 drive is monitored by the PMI processor. Fault and warning registers (202/1202 and 203/1203) in the UDC must be used when the system detects a fault or a warning. The fault conditions reported in the Drive Fault register result in turning off the drive. The UDC task is not stopped automatically when a drive fault occurs unless it is specifically instructed to do so in an application task.
6.1.2 DC Bus Overcurrent Fault (Bit 1) LED indicator: P.M. FLT The DC Bus Overcurrent fault bit is set if the DC bus current exceeds 125% of the rated Power Module current. Error code 1020 will be displayed in the error log of the UDC task in which the fault occurred. 6.1.3 Ground Current Fault (Bit 2) LED indicator: EXT FLT The Ground Current Fault bit is set if ground current exceeds the rating of the Power Module.
6.1.7 Overtemperature Fault (Bit 7) LED indicator: P.M. FLT The Overtemperature Fault bit is set if the internal temperature of the Power Module’s heatsink exceeds 100° C. Error code 1016 will be displayed in the error log of the UDC task in which the fault occurred. 6.1.
6.1.14 Communication Lost Fault (Bit 15) LED indicator: COMM OK The COMM OK LED is turned off, and the Communication Lost Fault bit is set if the fiber-optic communication between the PMI processor and the UDC module is lost due to two consecutive errors of any type. 6.2 PMI Regulator Warnings (UDC Register 203/1203) The PMI processor will check for conditions that are not serious enough to shut down the drive, but may affect its performance.
6.2.6 Tuning Aborted Warning (Bit 5) The Tuning Aborted Warning bit is set if any of the automatic tuning procedures (e.g., resolver balance and gain calibration) is not successful. 6.2.7 Overtemperature Warning (Bit 7) The Overtemperature Warning bit is set if the internal temperature of the Power Module’s heatsink exceeds 90° C. 6.2.8 Bad Gain Data Warning (Bit 8) The Bad Gain Data Warning bit is set if an invalid local tunable variable or drive parameter has been loaded. 6.2.
6-6 PMI Regulator
CHAPTER 7 Circuit Board Replacement Guidelines ! ATTENTION:Only qualified personnel familiar with the construction and operation of this equipment and the hazards involved should install, adjust, operate, or service this equipment. Read and understand this manual and other applicable manuals in their entirety before proceeding. Failure to observe this precaution could result in severe bodily injury or loss of life.
TB1 Power Terminal Block TB4 24V DC Auxiliary Input 1 TE Shield Terminals TB4 TB4 TB4 TE TE TE TB1 TB1 TB1 Location TB1 Frames B, C TB1 Location Frame D Frame E R,S,T TB1 Location +,– TB4 TB4 TB4 TE TE TE TB1 Brake Terminals TB1 Location TB1 PE Ground Frame F Frame G TB1 Location TB1 PE Ground Frame H 1. Terminal block TB4 is an auxiliary 24V input that can be used to power the PMI Regulator when incoming AC or DC power is removed. Figure 7.
7.1 Replacing the PMI Regulator Assembly Perform the following steps to replace the PMI Regulator assembly: Step 1. Disconnect all connector cables from the PMI Regulator motherboard and the Resolver & Drive I/O board. Use care when removing connectors to avoid bending the connector pins. Refer to figure 1.1, 2.1, or 3.1 for the locations of these connectors: a. Resolver Feedback cable and Drive I/O cable on the Resolver & Drive I/O board. b. 50-pin PMI interface connector c. NTC thermistor cable d.
7.3 Replacing the LED Status Board Perform the following steps to replace the LED status board: Step 1. Remove the two (2) M3 x 6 screws that fasten the LED board to the standoffs on the motherboard. Step 2. Carefully pull the LED board straight out off its connector pins. Step 3. Align the connector on the new LED board with the connector pins on the motherboard and carefully push the board into position. Inspect the installation to make sure the pins are inserted correctly. Step 4.
APPENDIX A PMI Regulator Specifications Ambient Conditions • Storage temperature: -30° C (-22° F) • Operating temperature: 0 to 60° C (32 to 140° F) • Humidity: 5-95%, non-condensing Maximum Power Dissipation • 11 W Power Requirements • 5V @ 1.3A • +15V @ 120mA • -15V @ 120 mA Analog Output Specifications • Number of outputs: 4 • Number of commons: 4 • Operating range: -10 to +10 VDC • Maximum output current: 20 mA • Resolution: 8 bits binary • Non-linearity: +/- 1 LSB maximum • Accuracy: 2.
Fiber Optic Port • Transmitter: 1 • Receiver: 1 • Data rate: 10 Mbd • Coding: Manchester • Protocol: HDLC (compatible with UDC module) Flex I/O Interface • Coding: Proprietary • Channels: 1 • Scan rate: Dependent on UDC Module scan rate A-2 PMI Regulator
APPENDIX B Resolver & Drive I/O Board Specifications Ambient Conditions • Storage temperature: -30° C (-22° F) • Operating temperature: 0 to 60° C (32 to 140° F) • Humidity: 5-95%, non-condensing Maximum Power Dissipation • 6W Power Requirements • 5V @ 300 mA • +15V @ 150 mA • -15V @ 150 mA Resolver Interface • Resolution: 12 or 14 bits (software-selectable) • Required resolver accuracy (electrical) • 12-bit configuration: 5 arc minutes (typical) • 14-bit configuration: 1 arc minute • External strobe in
Resolver Specifications Resolver Type Accuracy Max. Error Spread (Electrical) Resolver Mechanical Max. Speed 613469-1R,-2R x1 16 arc minutes 613469-1S,-2S x2 800123-R,-1R,-2R Resolver Part No. Resolver & Drive I/O Resulting Effective Resolver Max.
Digital Output • Number of outputs: 2 contact closure • Contact rating: 2 amps • Maximum operating voltage: 132 volts rms • On state voltage drop at rated current: 1.5 volts • Peak inrush (1 sec): 5 amps • Maximum leakage current: 4.
B-4 SA3100 Power Modules
APPENDIX C PMI Regulator / UDC Register Cross-Reference PMI Motherboard Description Register Flex I/O data 0-9/12-21 Flex I/O errors 10-11/22-23 PMI-UDC communication status 80-89/1080-1089 PMI meter port output 106/1106 Bit DRV RDY LED AC Power Technology Fault 202/1202 11 DC bus overcurrent fault 202/1202 1 Instantaneous overcurrent fault 202/1202 3 Charge bus time out fault 202/1202 6 Over temperature fault 202/1202 7 DC bus overvoltage fault 202/1202 0 Ground current fault
Resolver & Drive I/O Board Description Bit Resolver scan position data 215/1215 Resolver strobe position 216/1216 Enable external strobe 101/1101 8 Enable external strobe falling edge 101/1101 9 External strobe detected 201/1201 8 External strobe level 201/1201 9 Enable resolver balance calibration test 101/1101 6 Resolver gain calibration test complete 201/1201 6 Resolver balance calibration test complete 201/1201 7 Tuning aborted 203/1203 5 Analog input data 214/1214 Drive
APPENDIX D PMI Regulator Replacement Parts Please see publication SA3100-6.0 for spare parts information.
D-2 PMI Regulator
APPENDIX E PMI Regulator Test Points The following figure illustrates the PMI Regulator test points that may be used for diagnostic purposes. Note that this figure is a basic overview only. Refer to the prints, wiring diagrams (W/Ds), and other documentation shipped with your drive system for specfic information.
Figure E.1 shows the test point arrangement on the PMI regulator mother board. CON18 AGND CON9 CON8 CON7 V-W VOLT V-V VOLT V-U VOLT CON16 CON22 Iq AGND CON14 BUS VOLT CON15 Id CON13 BUS CUR CON12 CON19 Iw FB CON17 AGND CON10 AGND CON11 Iu FBK Iv FBK CON20 DGND CON21 DGND P8 P7 P6 PE PE PE Figure E.
INDEX A E AC power technology circuit, 2-10 to 2-11 block diagram, 2-11 Analog input connections, 5-7 to 5-10 description, 3-7 to 3-8 Analog input circuits, 3-8, 5-8 to 5-10 balanced driven off ground, 5-9 balanced floating, 5-10 balanced grounding, 5-9 single-ended driven off ground, 5-8 single-ended floating, 5-9 single-ended grounded, 5-8 Analog input only DIN rail connections, 5-6 terminal board connections, 5-6 AutoMax, 1-1 Auxiliary input circuit, 3-9 External strobe input circuit, 3-4 timing diagr
M MCR and auxiliary output circuit, 3-10 Meter ports, 2-2 connector, 5-2 output circuit, 2-3 wiring, 5-2 Motherboard, 2-1 to 2-17 electrical description, 2-7 to 2-17 mechanical description, 2-1 to 2-7 P PMI connector, 2-2 PMI connector signals, 2-12 to 2-16 AC line feedback, 2-15 DC bus pre-charge, 2-16 DC bus voltage feedback, 2-14 to 2-15 DESAT, 2-15 digital grounds, 2-13 gate drivers, 2-13 ground current feedback, 2-15 motor current feedback, 2-13 to 2-14 motor voltage feedback, 2-14 pinout, 2-12 power
Rockwell Automation / 24703 Euclid Avenue / Cleveland, Ohio 44117 / (216) 266-7000 Printed in U.S.A.
