Installation manual

Publication 1747-RM001G-EN-P - November 2008
5-20 Data Handling Instructions
And (AND)
This instruction performs a bit-by-bit logical AND. The operation is
performed using the value at source A and the value at source B. The result is
stored in the destination.
Source A and B can either be a word address or a constant; however, both
sources cannot be a constant. The destination must be a word address.
Updates to Arithmetic Status Bits
The arithmetic status bits are found in Word 0, bits 0 to 3 in the controller
status file. After an instruction is executed, the arithmetic status bits in the
status file are updated.
AND
Bitwise AND
Source A B3:1
C0E0h<
Source B 255
255<
Dest B3:1
C0E0h<
AND
Output Instruction
Fixed SLC
5/01
SLC
5/02
SLC
5/03
SLC
5/04
SLC
5/05
• •••••
Table 5.9 Truth Table for A AND B = Dest
ABDest
000
100
010
111
Table 5.10 Controller Function
With this Bit The Controller
S:0/0 Carry (C) always resets.
S:0/1 Overflow (V) always resets.
S:0/2 Zero (Z) sets if result is zero; otherwise resets.
S:0/3 Sign (S) sets if most significant bit is set; otherwise resets.