Installation manual

Publication 1747-RM001G-EN-P - November 2008
Understanding Interrupt Routines 11-21
Interrupt Latency and Interrupt Occurrences
Interrupt latency is the interval between DII detection and the start of the
interrupt subroutine. DII interrupts can occur at any point in your program,
but not necessarily at the same point on successive interrupts. Interrupts can
occur between instructions in your program, inside the I/O scan (between
slots), or between the servicing of communications packets. The table below
shows the interaction between an interrupt and the processor operating cycle.
If an interrupt occurs while the SLC 5/03 (or higher) processor is performing
a multi-word slot update and your interrupt subroutine accesses that same slot,
the multi-word transfer completes prior to performing the interrupt
subroutine slot access.
Note that DII execution time adds directly to the overall scan time. During the
latency period, the processor is performing operations that cannot be
disturbed by the DII interrupt function. The Interrupt Latency Control Bit
(S:33/8) functions as follows.
• When the bit is set (1) interrupts are serviced within the minimum time
possible. The time will vary depending upon which processor and
communication protocol you are using.
• The default state is cleared (0). When S:33/8 is clear (0), user interrupts
occur between rungs and I/O slot updates. To determine the interrupt
latency with S:33/8 clear, you must calculate the execution time of each
and every rung of your program, then the add the execution time of the
longest rung to the latency time.
DII DII with Bit S:33/8
set
DII with Bit S:33/8
cleared
Input Scan Between slot updates Between word updates Between slot updates
Program Scan Between instruction
updates
Between word updates Between rung updates
Output Scan Between slot updates Between word updates Between slot updates
Communications Between communication
packets
Between word packet
updates
Between
communication packets
Processor Overhead At start and end Between word updates Between word updates
Events in the Processor Operating Cycle