Installation manual

Publication 1747-RM001G-EN-P - November 2008
13-52 SLC Communication Channels
Channel 0
System
Error Detection CRC With this selection, you choose the how the processor checks the
accuracy of each DF1 packet transmission.
BCC: This algorithm provides a medium level of data security. It
cannot detect:
• transposition of bytes during transmission of a packet.
• the insertion or deletion of data values of zero within a
packet.
CRC: This algorithm provides a higher level of data security.
Select an error detection method that all devices in your
configuration can use.
When possible, choose CRC.
Embedded Responses Auto-detect To use embedded responses, choose Enabled. If you want the
processor to use embedded responses only when it detects
embedded responses from another device, choose Auto-detect.
If you are communicating with another Allen-Bradley device, choose
Enabled. Embedded responses increase network traffic efficiency.
Duplicate Packet
Detect
Enabled Duplicate Detect lets the SLC detect if it has received a message that
is a duplicate of its most recent message from the master station. If
you choose duplicate detect, the processor will acknowledge (ACK)
the message but will not act on it since it has already performed the
message’s task when it received the command from the first
message.
If you want to detect duplicate packets and discard them, check this
parameter. If you want to accept duplicate packets and execute them,
leave this parameter unchecked.
ACK Timeout 50 The amount of time in 20 millisecond increments that you want the
processor to wait for an acknowledgment to the message it has sent
before sending an enquiry (ENQ) for the reply.
NAK Retries 3 The number of times the processor will resend a message packet
because the processor received a NAK response to the previous
message packet transmission.
ENQ Retries 3 The number of enquiries (ENQs) that you want the processor to send
after an ACK timeout occurs.
Table 13.15 Define these communication parameters when configuring a SLC 5/03, 5/04, or 5/05 processor for DF1 full-duplex
communication. (Continued)
Tab Parameter Default Selections