Installation manual

Publication 1747-RM001G-EN-P - November 2008
B-48 SLC Status File
S:33/7 Dynamic Config Message Servicing Selection (Channel 1)
This bit is only valid when the channel 1 Comms Servicing
Selection bit (S:2/15) is clear (which selects service all
commands). When S:33/7 is clear and S:2/15 is clear, all
outgoing channel 1 MSG instructions are serviced per END,
TND, SVC, or REF instruction. Otherwise, only one outgoing
channel 1 MSG command or reply is serviced per END, TND,
SVC, or REF instruction.
•••
S:33/8 Static Config Interrupt Latency Control Bit
When set, interrupt latency occurs for user interrupts (DII,
STI, and I/O Event). This means that when an interrupt
occurs, you are guaranteed to be at rung 0 of your interrupt
subroutine within the stated interrupt latency period
(assuming no interrupt of equal or higher priority is
executing). You must select this at the time you save your
program.
When clear, user interrupts may only interrupt the processor
at predefined points of execution in the user program cycle.
Interrupt latency is then defined as the longest period of
time that can occur between any two predefined points.
When S:33/8 is clear, you must analyze each user program.
The bit is clear by default.
The following points are the only points in which user
interrupt subroutines are allowed to execute when S:33/8 is
clear:
• at the start of each rung
• following the servicing of communication
• between slots when updating the input or output
image, or any specialty I/O card
•••
S:33/9 Status Scan Toggle Bit
This bit is cleared upon entry into the RUN mode. This bit
changes state each and every execution of an END, TND, or
REF instruction. Use this bit in your user program for
applications such as multiplexing subroutine execution.
•••
Table B.4 Status File Functions (Continued)
Address Classification Description Fixed
5/01
5/02 5/03 5/04 5/05