User Manual

system components 523-0 809018
2.8.5. Installation and Removal.
Make sure that the aircraft battery master switch is turned off b efore installing any equipment, mounts, or inter-
connect cables.
The installation and removal instructions for the TDR-94D follow.
2.8.5.1. I
nstallation. The procedure to install the TDR-94D follows:
a. Remove electrical power from the aircraft.
b. Install the MMT-150 Modular Mounting Tray and connector kit according to the procedures printed in the Pro Line II Installa-
tion Manual (CPN 523-0772719).
c. Install and orient the mating c onnector keyway pins, ( part of the mating connector kits). If installing systems on multiple
aircraft, similar orientation of the keyw ays is advisable for q uick maintenance removal and replacement.
d. Verify all interconnect wiring before proceeding. Verify input power is applied to appropriate pins only.
e. Remove aircraft power and slide TDR-94D ATC/Mode S Transponder into mount until mating connector is fully engaged.
f. Position knurled knobs on front of mount to engage unit-mounting projections and tighten knurled knobs.
g. Push on the front panel to make sure that the unit is fully seated in the mount. Retighten t he knurled knobs until the unit is
secure in mount.
h. Make sure a good electrical bond exists between the unit and mount.
i. Install safety wire.
2.8.5.2. R
emoval. The procedure to remove the TDR-94D follows:
a. Remove electrical power from the aircraft.
b. Remove the safety wire.
c. Loosen the knurled knobs that secure the unit to the mount.
d. Pull TDR-94D ATC/Mode S Transponder from mount.
2.8.6. I
nternal Theory of Operation.
Refer to Figure 2-11. When active, the TDR responds to valid ATCRBS radar interrogations with a coded identificationinMode-A
or reporting altitude in Mode-C reply. The resp onse code is selected on the c ontroller.
2.8.6.1. The TDR consists of a main microprocessor, serial and discrete I/O interfaces, a 1030 MHz receiver, an interrogation
processor, and a 1090 MHz transmitter. Operating power is derived from the +28 V dc avionics t riple-fed bus supply. This input is
filtered and applied through an internal breaker to the low-voltage power supply. This supply generates internally required low-level
voltages, and feeds the high-voltage power supply. A voltage monitor reports power supply integrity to the microprocessor.
2.8.6.2. Refer to Figure 2-11. The main microprocessor uses a 16-bit bidirectional data bus to control unit operation. An address
latch and a data transceiver provide the interface between the processor and int e rnal circuits. This processor controls all I/O data
transfer, monitors key internal power levels, programs the frequency synthesizer, generates high-voltage supply disable logic, and
shares data with the dedicated video processor through a dual-port Random Access Memory (RAM). The processor also directly
monitors the temperature of the transmit modulator. If temperature becomes excessive, data is latched that toggles a discrete to
inhibit the high-voltage power supply.
2.8.6.3. The I/O in terface circuits consist of three input UARTs, two discrete i nput buffers, and two output UARTs. The main
microprocessor accesses each circuit using the bidirectional data bus (DB0-DB15).
2.8.6.4. ARINC 429 low-speed data buses are r eceived and applied to the RTU multiplexer. The microprocessor reads the PORT
A/B select discrete and selects the active port. The RTU multiplexer supplies control data from the selected port, A or B, through
an input UART to the microprocessor.
2.8.6.5. The second input UART is reserved for two Air Data Computer (ADC) air d a ta input buses.
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