Operating instructions

R&S ESCI Status Reporting System

1166.6004.12 5.19 E-1

CONDition part The CONDition part is directly written into by the hardware or the sum bit of

the next lower register. Its contents reflects the current instrument status. This

not affected by reading.

PTRansition part The Positive-TRansition part acts as an edge detector. When a bit of the

CONDition part is changed from 0 to 1, the associated PTR bit decides

whether the EVENt bit is set to 1.

PTR bit =1: the EVENt bit is set.

PTR bit =0: the EVENt bit is not set.

This part can be written into and read at will. Its contents is not affected by

reading.

NTRansition part The Negative-TRansition part also acts as an edge detector. When a bit of the

CONDition part is changed from 1 to 0, the associated NTR bit decides

whether the EVENt bit is set to 1.

NTR-Bit = 1: the EVENt bit is set.

NTR-Bit = 0: the EVENt bit is not set.

This part can be written into and read at will. Its contents is not affected by

reading.

With these two edge register parts the user can define which state transition of

the condition part (none, 0 to 1, 1 to 0 or both) is stored in the EVENt part.

EVENt part The EVENt part indicates whether an event has occurred since the last

reading, it is the "memory" of the condition part. It only indicates events

passed on by the edge filters. It is permanently updated by the instrument.

This part can only be read by the user. During reading, its contents is set to

zero. In linguistic usage this part is often equated with the entire register.

ENABle part The ENABle part determines whether the associated EVENt bit contributes to

the sum bit (cf. below). Each bit of the EVENt part is ANDed with the

associated ENABle bit (symbol '&'). The results of all logical operations of this

part are passed on to the sum bit via an OR function (symbol '+').

ENABle-Bit = 0: the associated EVENt bit does not contribute to the sum bit

ENABle-Bit = 1: if the associated EVENT bit is "1", the sum bit is set to "1" as

well.

This part can be written into and read by the user at will. Its contents is not

affected by reading.

Sum bit As indicated above, the sum bit is obtained from the EVENt and ENABle part

for each register. The result is then entered into a bit of the CONDition part of

the higher-order register.

The instrument automatically generates the sum bit for each register. Thus an

event, e.g. a PLL that has not locked, can lead to a service request throughout

all levels of the hierarchy.

Note: The service request enable register SRE defined in IEEE 488.2 can be taken as ENABle

part of the STB if the STB is structured according to SCPI. By analogy, the ESE can be

taken as the ENABle part of the ESR.