Datasheet

Technical Note
3/9
BD52□□G, BD52□□FVE, BD53□□G, BD53□□FVE series
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2009.06 - Rev.B
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 Block Diagrams
BD52G/FVE
Fig.1
BD53G/FVE
Fig.2
SSOP5 VSOF5
PIN No. Symbol Function PIN No. Symbol Function
1 VOUT Reset Output 1 VOUT Reset Output
2 VDD Power Supply Voltage 2 SUB Substrate*
3 GND GND
3 CT
Capacitor connection terminal for
output delay time
4 N.C. Unconnected Terminal
5 CT
Capacitor connection terminal for
output delay time
4 GND GND
5 VDD Power Supply Voltage
*Connect the substrate to GND.
Vref
VOUT
V
DD
GND
CT
Vref
VOUT
V
DD
GND
CT
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