FEB. 21,1980 1 RS FLIP FLOP (2/4 IC3) (a) PLAY Mode When the START switch S5 is turned ON, the Q cutput goes to H and triggers the Clock Generator (2). Mhen the STOP switch S6 is turned ON, the Q output goes to L and the Clock Generator stops oscillation. At this time, the Q output goes to H and resets the Binary Counter (5) (b) WRITE Mode The Q output goes to H when S5 is turned ON, and goes to L when S6 turned ON. This condition is written in the Memory IC1 as a data.
DR-5 5 6 256 x 4 BIT CMOS MEMORY (IC1) Reading/writing from/to this memory is as described below. The upper 3 bits designate rhythms 1-8, the next one bit designates VARIATION A and B, and. the lower 4 bits 16 steps in one rhythm. In PLAY mode, the terminal CE2 is connected. to the Clock generator output. The memory functions only when the clock is H, and outputs H's or L’s from DO 1-4. (When the clock is L, DO 1-4 becomes high impedance.
however,the ACCENT function of the DR-55 proper becomes invalid.