User`s manual

RTD Embedded Technologies, Inc. | www.rtd.com 26 FPGA35S6 User’s Manual
6.1.4 R_PORT0_IN (READ)
This is the input register for the port0. This reads the current value the I/O.
6.1.5 R_PORT0_OUT (WRITE)
This is the output register for the port0. The value to be output, direction must be set to output.
6.1.6 R_PORT0_DIR (WRITE)
This is the direction register for port0. Indicates the direction of each pin ‘0’ = input ‘1’ = output
6.1.7 R_PORT1_IN (READ)
This is the input register for the port1. This reads the current value the I/O.
6.1.8 R_PORT1_OUT (WRITE)
This is the output register for the port1. The value to be output, direction must be set to output.
6.1.9 R_PORT1_DIR (READ/WRITE)
This is the direction register for port1. Indicates the direction of each pin ‘0’ = input ‘1’ = output
6.1.10 R_PORT2L_IN (READ)
This is the input register for the port2 low, port2_[0]…port2_[15]. This reads the current value the I/O.
6.1.11 R_PORT2L_OUT (WRITE)
This is the output register for the port2 low, port2_[0]…port2_[15]. The value to be output, direction must be set to output.
6.1.12 R_PORT2L_DIR (READ/WRITE)
This is the direction register for port2 low, port2_[0]…port2_[15]. Indicates the direction of each pin ‘0’ = input ‘1’ = output
6.1.13 R_PORT2H_IN (READ)
This is the input register for the port2 high, port2_[16]…port2_[19]. This reads the current value the I/O.
6.1.14 R_PORT2H_OUT (WRITE)
This is the output register for the port2 high, port2_[16]…port2_[19]. The value to be output, direction must be set to output.
6.1.15 R_PORT2H_DIR (READ/WRITE)
This is the direction register for port2 high, port2_[16]…port2_[19]. Indicates the direction of each pin ‘0’ = input ‘1’ = output
6.1.16 R_DDR_RD_DATA (READ)
Reads the data of the DDR2 SRAM at R_DDR_ADDR location
A read is performed by writing address to R_DDR_ADDR.
6.1.17 R_DDR_WR_DATA (READ/WRITE)
Writes data in registry to location R_DDR_ADDR of the DDR2 SRAM
6.1.18 R_DDR_ADDR (READ/WRITE)
Address pointer of the DDR2 SRAM.