User`s manual

BIOS
Page 4-9
Write to Read delay (tWTR)
This bits specifies the Write to Read delay. Samsung Calls this Tcd1r (last data in to
read command). It is measured from the rising edge following the last non-masked data
strobe to the rising edge of the next Read Command. (Jedec spec this as exactly one
clock).
Options: Auto, 1 Bus Clock.
Read to Write delay (tRWT)
This filed specifies the Read to write delay. This is not a DRAM specified timing
parameter but must be considered due to routing latencies on the clock forwarded bus.
It is counted from first address but slot which was not associated with part of the read
burst.
Options: Auto, 1 Bus Clock ~ 6 Bus Clocks in 1 Bus clock increments.
Refresh period (tREF)
This filed specifies the number of clock cycles between refresh.
Options: Auto, 1 x 1552 cycles ~ 4 x 4672 cycles.
AGP & P2P Bridge Control
Scroll to AGP & P2P Bridge Control and press <Enter>. The following screen
appears:
AGP Aperture Size (MB)
This item defines the size of the aperture if you use an AGP graphics adapter. It
refers to a section of the PCI memory address range used for graphics memory.
Options: 32M, 64M, 128M, 256M.
AGP Mode
Chipset AGP Mode support.
Options: 1X, 2X, 4X, 8X.