Rev. 1.3, Jun. 2009 MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB PM800 - 2.5" SATA 3.0Gb/s MLC SSD (NAND based Solid State Drive) datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD Revision History Revision No. Draft Date Remark Preliminary version Nov. 18, 2008 Preliminary 1.0 Final version Feb. 03, 2009 Final 1.1 Updated power consumption at page 6, 8 Mar. 20, 2009 Final 1.2 Updated weight at page 6, 7 May. 08, 2009 Final 1.3 Revised performance at page 6, 8 Jun. 18, 2009 Final 0.1 History -2- Editor K.W.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Table Of Contents 1.0 General Description .................................................................................................................................................... 5 2.0 Mechanical Specification ........................................................................................................................................... 6 2.1 Physical dimensions and Weight ..................................................
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet 7.3.2 Device Attribute Data Structure........................................................................................................................ 24 7.3.2.1 Data Structure Revision Number ................................................................................................................ 24 7.3.2.2 Individual Attribute Data Structure .........................................................................................
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 1.0 General Description The NSSD(Nand based Solid State Drive) of Samsung Electronics fully consists of semiconductor devices using NAND Flash Memory which provide high reliability and high performance for a storage media.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 2.0 Mechanical Specification 2.1 Physical dimensions and Weight Physical dimensions and Weight Model Height (mm) Width (mm) Length (mm) Weight (gram) 256GB 9.50 ± 0.2 69.85 ± 0.25 100.00 ± 0.25 Max 84 128GB 9.50 ± 0.2 69.85 ± 0.25 100.00 ± 0.25 Max 75 64GB 9.50 ± 0.2 69.85 ± 0.25 100.00 ± 0.25 Max 68 Figure 2-1.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 3.0 Product Specifications 3.1 System Interface and Configuration • Burst read/write rate is 300 MB/sec (3.0 Gb/sec). • Fully compatible with ATA-7 Standard and TCG (Partially Complies with ATA/ATAPI-8) 3.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 3.7 Environmental Specifications Features Operating Non-Operating Temperature 0°C to 70°C -55°C to 95°C Humidity 5% to 95%, non-condensing Vibration 20G Peak, 10~2000Hz,(15mins/Axis)x3 Axis Shock 1500G, duration 0.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 4.0 Electrical Interface Specification 4.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet 4.2 Pin Assignments No. Signal Plug Connector pin definition S1 GND S2 A+ S3 A- S4 GND S5 B- S6 B+ S7 GND 2 nd mate Differential signal A from Phy 2nd mate Differential signal B from Phy 2nd mate Key and spacing spearate signal and power segments Power P1 V33 3.3V power (Unused) P2 V33 3.3V power (Unused) P3 V33 3.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 5.0 Frame Information Structure (FIS) 5.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 5.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 5.3 Data 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 R R R Reserved (0) 0 Reserved (0) 9 8 7 6 Reserved (0) 5 4 3 2 1 0 1 0 1 0 FIS Type (48h) ... N DWORDs of data (minimum of DWORD - maximum of 2048 DWORDs ... n [Table 5-7] Register - Data FIS layout 5.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 5.5 DMA Activate - Device to Host 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 R R R Reserved (0) 0 Reserved (0) 9 8 7 6 Reserved (0) 5 4 3 2 1 0 1 0 1 0 FIS Type (39h) [Table 5-10] DMA Activate Layout (Write DMA/Write DMA Queued/Service) 5.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 6.0 Shadow Register Block registers Description 6.1 Command Register This register contains the command code being sent to the device. Command execution begins immediately after this register is written. All other registers required for the command must be set up before writing the Command Register. 6.2 Device Control Register This register contains the command code being sent to the device.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 6.5 Features Register This register is command specific. This is used with the Set Features command, S.M.A.R.T. Function Set command. 6.6 Cylinder High (LBA High) Register This register contains Bits 16-23. At the end of the command, this register is updated to reflect the current LBA Bits 16-23. 6.7 Cylinder Low (LBA Mid) Register This register contains Bits 8-15.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.0 Command Descriptions 7.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 7.2 SECURITY FEATURE Set The Security mode features allow the host to implement a securtity password system to prevent unauthorized access to the disk drive. 7.2.1 1 SECURITY mode default setting The NSSD is shipped with master password set to 20h value(ASCII blanks) and the lock function disabled.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.1.4 S.M.A.R.T. Enable/Disable Attribute Autosave (subcommand D2h) This subcommand enables and disables the attribute auto save feature of the device. The S.M.A.R.T. Enable/Disable Attribute Autosave subcommand allows the device to automatically save its updated Attribute Values to the Attribute Data Sector at the timing of the first transition to Active idle mode and after 15 minutes after the last saving of Attribute Values.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.1.7 S.M.A.R.T. Selective self-test routine When the value in the LBA Low register is 4 or 132, the Selective self-test routine shall be performed. This selftest routine shall include the initial tests performed by the Extended self-test routine plus a selectable read scan. The host shall not write the Selective self-test log while the execution of a Selective self-test command is in progress.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.1.8 S.M.A.R.T. Read Log Sector (subcommand D5h) This command returns the indicated log sector contents to the host. Sector count sepcifies the number of sectors to be read from the specified log. The log transfferred by the drive shall start at the first sector in the speicified log, regardless of the sector count requested. Sector nubmer indicates the log sector to be returned as described in the following Table.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.1.12 S.M.A.R.T. Return Status (subcommand DAh) This subcommand is used to communicate the reliability status of the device to the host's request. Upon receipt of the S.M.A.R.T. Return Status subcommand the device asserts BSY, saves any updated Attribute Values to the reserved sector, and compares the updated Attribute Values to the Attribute Thresholds.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.2 1 Device Attribute Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.2.2 Data Structure Revision Number The Data Structure Revision Number identifies which version of this data structure is implemented by the device. This revision number will be set to 0005h. This revision number identifies both the Attribute Value and Attribute Threshold Data structures. 7.3.2.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.2.5 Self-test execution status Bit 0-3 4-7 Definition Percent Self-test remaining. An approximation of the percent of the self-test routine remaining until completion given in ten percent increments. Valid values are 0 through 9. Current Self-test execution status. 0 The self-test routine completed without error or has never been run. 1 The self-test routine was aborted by the host.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.2.10 Error logging capability Bit 7-1 0 Definition Reserved (0) The Error Logging support bit. If bit = 1, the device supports the Error Logging 7.3.2.11 Self-test failure check point This byte indicates the section of self-test where the device detected a failure. 7.3.2.12 Self-test completion time These bytes are the minimum time in minutes to complete the self-test. 7.3.2.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 7.3.3.5 Attribute Threshold These values are preset at the factory and are not meant to be changeable. However, the host might use the "S.M.A.R.T. Write Attribute Threshold" subcommand to override these preset values in the Threshold sectors. 7.3.3.6 Data Structure Checksum The Data Structure Checksum is the 2's compliment of the result of a simple 8-bit addition of the first 511 bytes in the data structure. 7.3.4 1 S.M.A.R.T.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet 7.3.5.4 Device error count This field contains the total number of errors. The value will not roll over. 7.3.5.5 Error log data structure The data format of each error log structure is shown below.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet 7.3.5.7 Error data structure Data format of error data structure is shown below. Byte n Descriptions Reserved n+1 Content written to the Error register after command completion occurred. n+2 Content written to the Sector Count register after command completion occurred. n+3 Content written to the LBA Low register after command completion occurred. n+4 Content written to the LBA Mid register after command completion occurred.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 7.3.6 1 Self-test log structure The following defines the 512 bytes that make up the Self-test log sector. Byte Byte 0~1 Data structure revision n*24+2 Self-test number n*24+3 Self-test execution status n*24+4~n*24+5 Life timestamp n*24+6 Self-test failure check point n*24+7~n*24+10 LBA of first failure n*24+11~n*24+25 Vendor specific ... ...
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 7.3.8 1 Error reporting The following table shows the values returned in the Status and Error Registers when specific error conditions are encountered by a device. Error condition Status Register Error Register A S.M.A.R.T. FUNCTION SET command was received by the device without the required key being loaded into the LBA High and LBA Mid registers. 51h 04h A S.M.A.R.T.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 8.2 Phy Power State 8.2.1 1 COMRESET sequence state diagram 8.2.2 1 Interface Power States 8.2.2.2 PHYRDY The Phy logic and main PLL are both on and active. The interface is synchronized and capable of receiving and sending data. 8.2.2.3 Partial The Phy logic is powered, but is in a reduced power state. Both signal lines on the interface are at a neutral logic state (common mode voltage).
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet 8.2.4 1 PHYRDY to Partial/Slumber 8.2.4.2 Host Initiated for Partial 8.2.4.3 Device Initiated for Partial *For Slumber, the same sequence applies except PMREQ_PP is replaced with PMREQ_SP and Partial is replaced with Slumber. - 33 - Rev. 1.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Rev. 1.3 SSD 9.0 SATA II Optional Feature 9.1 Power Segment Pin P11 Pin P11 of the power segment of the device connector may be used by the device to provide the host with an activity indication and it may be used by the host to indicate whether staggered spinup should be used.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet 10.
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB datasheet Word 256GB 90 0003h Time required for Enhanced security erase complete Description 91 0000h Current advanced power management value 92 FFFEh Master Password Revision Code 93 0000h Hardware reset result 94 0000h Current automatic acoustic management value 95-99 0000h Reserved 100-103 1DCF 32B0h Maximum user LBA for 48bit Address feature set ( Compliant with IDEMA Standard ) 104-106 0000h Compliant with IDEMA Standard 10
MMDOE56G5MXP-0VB MMCRE28G5MXP-0VB MMCRE64G5MXP-0VB Rev. 1.3 datasheet SSD 11.0 Ordering Information MM X X X X X X X X X X - X X X X X 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1. Module: M 11. Flash Package 2. Card: M 12. PCB Revision AND Production Site 3~4. Flash Density 13. " - " 5. Feature 14. Packing Type E : NSSD 15~16. Controller 6~8. NSSD Density 17 ~ 18. Customer Grade 9. NSSD Type 5 : 2.5" Formfator 10. Component Generation 12.