Laptop User Manual

S3C2440A RISC MICROPROCESSOR THUMB INSTRUCTION SET

4-9

FORMAT 3: MOVE/COMPARE/ADD/SUBTRACT IMMEDIATE

15 0

14 10

[7:0] Immediate Vale

[10:8] Source/Destination Register

[12:11] Opcode

0 = MOV

1 = CMP

2 = ADD

3 = SUB

Offset8Rd

13 12 11

Figure 4-4. Format 3

OPERATIONS

The instructions in this group perform operations between a Lo register and an 8-bit immediate value. The THUMB

assembler syntax is shown in Table 4-4.

NOTE

All instructions in this group set the CPSR condition codes.

Table 4-4. Summary of Format 3 Instructions

OP THUMB Assembler ARM Equipment Description

00 MOV Rd, #Offset8 MOVS Rd, #Offset8 Move 8-bit immediate value into Rd.

01 CMP Rd, #Offset8

CMP Rd, #Offset8 Compare contents of Rd with 8-bit

immediate value.

10 ADD Rd, #Offset8 ADDS Rd, Rd, #Offset8 Add 8-bit immediate value to contents of Rd

and place the result in Rd.

11 SUB Rd, #Offset8 SUBS Rd, Rd, #Offset8 Subtract 8-bit immediate value from

contents of Rd and place the result in Rd.