User`s manual

S3F84A5_UM_REV1.10 I/O PORTS
9-11
Port 2 Control Register, Low Byte (P2CONL)
EBH, Set1, Bank0, R/W, Reset value:00H
LSBMSB.7.6.5 .4.3.2.1.0
.7 .6 bit/P2.3/PWM2B
00
01
10
11
Input mode
Input mode with pull-up
Push-pull output or PWM2B output
Open-drain output
.5 .4 bit/P2.2/TACAP
00
01
10
11
.3 .2 bit/P2.1/TACK/PWM1A
00
01
10
11
.1 .0 bit/P2.0/TAOUT/PWM1B
00
01
10
11
Input mode; TACAP input
Input mode with pull-up; TACAP input
Push-pull output
Open-drain output
Input mode; TACK input
Input mode with pull-up; TACK input
Push-pull output or PWM1A output
Open-drain output
Input mode
Input mode with pull-up
Push-pull output or PWM1B output
Alternative function: TAOUT signal output
P2.3
/PWM2B
P2.2
/TACAP
P2.1
/TACK/PWM1A
P2.0
/TAOUT/PWM1B
Figure 9-6. Port 2 Low-Byte Control Register (P2CONL)