User`s manual

16-BIT TIMER 0 S3F84A5_UM_REV1.10
12-4
Timer Interrupt Pending Register (TINTPND)
F1H, Set1, Bank1, Reset: 00H, R/W
LSBMSB .7 .6 .5 .4 .3 .2 .1 .0
Timer A macth/capture
interrupt pending flag:
Timer A overflow
interrupt pending flag:
0 = Not pending (clear pending bit)
1 = Interrupt pending
Timer B match
interrupt pending flag:
0 = Not pending (clear pending bit)
1 = Interrupt pending
0 = Not pending (clear pending bit)
1 = Interrupt pending
Timer 0 overflow
interrupt pending flag:
0 = Not pending (clear pending bit)
1 = Interrupt pending
Timer 0 match
interrupt pending flag:
0 = Not pending (clear pending bit)
1 = Interrupt pending
Timer B overflow
interrupt pending flag:
0 = Not pending (clear pending bit)
1 = Interrupt pending
Not used
Figure 12-2. Timer A/B and Timer 0 Pending Register (TINTPND)