User`s manual

UART S3F84A5_UM_REV1.10
14-6
BLOCK DIAGRAM
Zero Detector
UDATA
RxD (P0.0)
TIE
RIE
Interrupt
1-to-0
Transition
Detector
RE
RIE
Bit Detector
Shift
Value
MS0
MS1
MS0
MS1
RxD (P0.0)
SAM8 Internal Data Bus
Write to
UDATA
Baud Rate
Generator
S
DQ
CLK
TB8
CLK
Tx Control
Start
Tx Clock
TIP
Shift
EN
Send
Rx Control
Rx
Clock
Start
RIP Receive
Shift
Shift
Clock
MS0
MS1
fxx
SAM8 Internal Data Bus
Shift
Register
UDATA
8 BIT
BRDATA
TxD (P0.1)
TxD (P0.1)
Figure 14-5. UART Functional Block Diagram