User Guide

SGH-P730 Flow Chart o f Troubleshooting and Circuit Diagrams
2-4
USB
MEMORY
TRIDENT
BOARD_HOLE
JTA G
G6
J
I
G
_
O
N
VCCD
R 614
C 418
R43
R 400
C 403
C 404
C 412
)
O S C 402
2
3
4
1
R 409
G7
VSSX7
G8
H2
VSSX8
H5
VSSX9
B7
WRN
B1
XTAL1
XTAL2
C1
R 418
G3
H6
VSS1
VSS10
H7
VSS11
H8
VSS2
B4
E1
VSST
B8
VSSX1
VSSX2
C7
F7
VSSX3
VSSX4
G4
G6
VSSX5
VSSX6
F8
PW U PN
RDN
A8
RESET
D8
D7
SOFN
E7
SUSPN
USBR
G5
VDD0
H4
B2
VDD1
VDDA
C2
D2
VDDT
VSS0
D5
D6
B6
A7
D7
DMINUS
D1
E2
DPLUS
A1
DPPU
H3
DSA
IOCSN
C8
IRQN
E8
1
NC1
NC2
2
A0
F2
F1
A1
A2
G2
A3
H1
A4
G1
D0
A3
B3
D1
D2
A4
A5
D3
D4
B5
A6
U 404
TP3
C 421
VCC D
C 401
T
D
I
T
X
V
B
A
T
47K
R 403
F
_
W
E
C 402
A
N
T
VC C _1.8A VCCD
C 400
C 423
C 422
C 411
R 408
L1
G7
WAIT
F5
WE#
WP#
E4
R 404
VPP/VPEN
VSS
B4
C4
VSS
VSS
L2
L5
VSS
VSS
L6
L7
VSS
L8
VSS
VSS
S-VC C
VCC1
B5
L4
VCC2
VCC2
B6
K6
VCC2
J8
VCCQ
VCCQ
K7
VCCQ
L3
D4
H1
F3
R-UB#
D5
R-WE#
K2
RFU
K3
RFU
F4
RST#
J1
S-CS1
C5
S-CS2
K4
NC
1
NC
2
OE#1
J2
H8
OE#2
D6
P-CS#
K8
P-M ODE
P-VC C
K5
C2
R-LB#
R-OE#
DU
DU
A2
A7
DU
A8
DU
DU
M1
M2
DU
DU
M7
M8
DU
D2
D3
H4
J5
D4
D5
G5
D6
J6
H7
D7
G2
D8
D9
J3
A1
D0
D1
H3
G4
D10
D11
J4
D12
H5
G6
D13
H6
D14
D15
J7
G3
A6
A7
E2
F6
A8
A9
D7
ADV#
E5
K1
CE#1
CE2
G8
CLK
C6
H2
A18
A19
B3
E1
A2
E6
A20
B7
A21
D1
A3
B1
A4
A5
C1
F2
A10
A11
B8
C8
A12
A13
D8
A14
F7
E8
A15
F8
A16
A17
D2
B2
C7
128M B
1G B
E3
256M B
C3
D3
512M B
G1
A0
A1
F1
E7
R 415
U 400
VCCB
R
X
C 415
C 409
VRTC
R 401
R 407
C 419
R419
R 405
C 414
C 405
2
SCK
SCN
3
SDI
1
11
VDD
G7
P
P
I
0
56
P
P
I
1
P
P
I
2
78
P
P
I
3
9
PPI4
PPI5
10
PPI6
12
4
RSTB
16
C
S
_
I
N
15
C
S
_
O
U
T
0
C
S
_
O
U
T
1
14
C
S
_
O
U
T
2
1317
G
N
D
21
N
C
22
N
C
U 406
VCCD
C 410
VCCB
VCC D
C 417
XTIC_MODE
X
V
R
E
F
F
1
0
TP1
C 427
T15
M9
XPA7/IRQ1
XPA8/IRQ2
T5
P2
XPA9/IRQ3
R
5
X
P
W
M
1
E8
XRTCALARM _N
N
1
0
X
S
M
0
_
C
L
K
U
1
2
X
S
M
0
_
D
A
T
A
D12
H
1
4
X
P
A
3
3
_
T
_
R
E
Q
A
N
1
7
M
1
7
X
P
A
3
4
_
T
_
R
E
Q
B
L
1
3
X
P
A
3
5
_
A
2
2
X
P
A
3
6
_
A
2
3
_
C
S
5
N
N
1
5
N14
XPA3/CS4N
P16
XPA4/OEN
P15
XPA5/WAITN
XPA6/BE1N
M
3
X
P
A
2
5
_
O
M
0
G
2
X
P
A
2
6
_
O
M
1
X
P
A
2
7
_
S
M
1
_
C
L
K
G
4
G
5
X
P
A
2
8
_
I
O
M
0
F
1
X
P
A
2
9
_
I
O
M
1
XPA2/CS3N
M11
X
P
A
3
0
_
I
M
0
F
3
X
P
A
3
1
_
I
M
1
E
1
X
P
A
3
2
_
C
S
0
N
P
1
3
L
2
X
P
A
1
9
/
C
P
_
M
O
S
I
XPA1/CS2N
M14
X
P
A
2
0
/
C
P
_
M
I
S
O
L
1
X
P
A
2
1
/
C
P
_
S
C
K
K
4
J
6
X
P
A
2
2
/
S
S
N
X
P
A
2
3
/
P
W
M
2
H
6
H
5
X
P
A
2
4
/
P
W
M
3
N2
K
5
X
P
A
1
1
/
I
R
D
A
R
X
X
P
A
1
2
/
I
R
D
A
T
X
N
1
G
6
X
P
A
1
3
_
T
X
1
X
P
A
1
4
_
R
X
1
G
3
H
4
X
P
A
1
5
/
T
X
0
X
P
A
1
6
/
R
X
0
L
3
X
P
A
1
7
_
D
R
Q
0
E
4
X
P
A
1
8
_
T
_
A
C
K
D
7
D
1
3
X
C
P
_
T
D
O
G
8
X
C
P
_
T
M
S
X
C
P
_
T
R
S
T
N
F
9
XCP_W EN
C13
X
F
R
S
T
B
F
4
XOSC32OUT
C6
M15
XPA0/CS1N
XPA10/IRQ4
M
4
X
C
P
_
K
B
2
/
S
I
N
2
X
C
P
_
K
B
3
/
S
I
N
3
T
1
X
C
P
_
K
B
4
/
S
I
N
4
R
2
T
3
X
C
P
_
K
B
5
/
S
O
U
T
0
X
C
P
_
K
B
6
/
S
O
U
T
1
U
3
P
3
X
C
P
_
K
B
7
/
S
O
U
T
2
T
4
X
C
P
_
K
B
8
/
S
O
U
T
3
N
3
X
C
P
_
K
B
9
/
S
O
U
T
4
X
C
P
_
T
C
K
D6
XCP_D5
E7
XCP_D6
XCP_D7
D5
XCP_D8
C4
B4
XCP_D9
X
C
P
_
T
D
I
C
7
L
4
X
C
P
_
K
B
0
/
S
I
N
0
L
5
X
C
P
_
K
B
1
/
S
I
N
1
C1
C2
XCP_D12
XCP_D13
D2
XCP_D14
D3
E3
XCP_D15
XCP_D2
F8
F7
XCP_D3
XCP_D4
C5
A15
XCP_A7
B17
XCP_A8
XCP_A9
C17
XCP_CSRAM EN
A13
A12
XCP_CSROMEN
A6
XCP_D0
XCP_D1
B5
B3
XCP_D10
XCP_D11
L14
XCP_A19
E14
XCP_A2
L15
XCP_A20
XCP_A21
L16
XCP_A3
D15
XCP_A4
B15
C14
XCP_A5
XCP_A6
A16
F14
XCP_A11
G14
XCP_A12
XCP_A13
G13
G17
XCP_A14
XCP_A15
J12
XCP_A16
K12
K13
XCP_A17
XCP_A18
K14
A11
XAG1
E11
XAG2
XAG3
D11
B7
XBSW N
M12
XCPTSTSTOP_CKO
XCP_A0_BEON
B13
XCP_A1
F11
XCP_A10
D16
H
1
1
V
S
S
V
S
S
J
7
V
S
S
K
6
V
S
S
A
E
1
0
V
S
S
_
D
P
L
L
E
1
5
A7
X1RTC
X2RTC
D10
XAG0
B11
L
8
V
S
S
J
1
1
L
9
V
S
S
V
S
S
A
3
V
S
S
F
6
G
9
V
S
S
V
S
S
G
1
0
H
7
V
S
S
E
1
7
G
1
6
V
D
D
_
D
P
L
L
D
8
V
R
T
C
A
2
V
S
S
K
7
V
S
S
L
6
V
S
S
V
S
S
L
1
0
M
7
V
S
S
V
S
S
B
1
4
V
D
D
E
M
1
V
D
D
E
V
D
D
E
U
2
P
8
V
D
D
E
V
D
D
E
U
1
5
U
1
6
V
D
D
E
V
D
D
E
N
1
6
E
1
6
V
D
D
E
V
D
D
E
R
4
T
1
3
V
D
D
V
D
D
R
1
6
R
1
7
V
D
D
V
D
D
A
5
C
1
6
V
D
D
C
1
1
V
D
D
A
V
D
D
E
B
1
H12
TDI
TDO
F12
TM S
G12
F15
TRST
E
2
V
D
D
V
D
D
L
1
7
V
D
D
G
1
R
1
V
D
D
V
D
D
R12
K11
IOBIT#1
L12
IOBIT#2
1
N
C
N
C
2
C
1
2
R
S
T
B
U5
RWN
TCK
H13
P6
DB#3
DB#4
U7
DB#5
T7
R7
DB#6
DB#7
M6
DB#8
P7
N7
DB#9
INT#0
N4
IO7
U6
N8
D B #10
D B #11
M8
U11
D B #12
D B #13
T11
D B #14
R11
P10
D B #15
DB#2
R6
P11
AB#4
AB#5
P12
R14
AB#6
T14
AB#7
AB#8
T17
C
K
I
F
1
7
CKO
G15
P5
DB#0
DB#1
U 401
AB#0
U13
M10
AB#1
AB#2
R13
AB#3
N11
R430
R 411
47K
VCC D
TP4
VCCD
C 408
VC C _1.8A
D
4
D
6
GND
2
VBUS
5
R 406
U405
D
1
3
D
T
C
K
C 424
G
N
D
VC C _1.8A
C 406
VCCD
VC C _1.8A
T
R
S
T
VC C _1.8A
R 402
VC C _1.8AVCCD
VBA T
C 425
C 413
TP2
C 416
R 417
1
B
3
GND
5
VCC
4
Y
T
M
S
U 403
2
A
U402
GND
3
2
VO
VS
1
VCCD
USB_3.3
C 407
C 420
R 410
T
D
O
TP5
C428
G5 G2
C 426
G4G1 G3
LED_BLUE1
LED_BLUE2
VC 01_R ESET
HOLE_SW 3
MAIN_BL_ON
VBAT
KEY_COL(3)
KEY_COL(4)
KEY_COL(0:4)
BP_VF
RCV_SW _EN
USB_NRW UP
JTA G _A N T
IRDA_TX
EAR_AUDIO_S W
PW R_KEEP
HOLE_SW 4
TR_RST
DLC_DETECT
EN _V C 01_2.5
A(22)
RST
TR_RST
HOLE_SW 2
US B _D _M INUS
US B _D _PLU S
VC 01_W R
DSP_DB(15:0)
KEY_ROW (4)
KEY_ROW (0)
KEY_ROW (1)
KEY_ROW (2)
KEY_ROW (3)
KEY_ROW (0:4)
KEY_COL(0)
KEY_COL(1)
KEY_COL(2)
D(12)
D(13)
D(14)
D(15)
D(2)
D(3)
D(4)
D(5)
D(6)
D(7)
D(8)
D(9)
FLASH_RESET
A(1:22)
CP_CSROMEN
C P _C S R O M 2EN
A(0)
CP_O EN
CP_CSRAM E N
UPPER_BYTE
D(0:15)
CP_W EN
A(23)
A(1)
A(2)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
A(18)
A(19)
A(20)
A(3)
A(21)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
A(10)
D(0)
D(1)
D(10)
D(11)
CP_W EN
CS_VC01
A(0)
A(1)
A(2)
A(3)
A(4)
D(0)
D(1)
D(2)
D(3)
D(4)
D(5)
D(6)
D(7)
CS_USB
USB_IRQ N
USB_NRW U P
CP_O EN
USB_RESET
CP_W EN
A(0)
A(22)
ADC_JACK
XLATCH_C E
IRDA_EN
USB_RESET
UP_SDI
RST
UP_SCLK
XLATCH_C E
CS_USB
CS_VC01
A(4)
A(3)
A(21)
A(20)
A(2)
A(19)
A(18)
A(17)
A(16)
A(15)
A(14)
A(13)
A(12)
A(11)
A(10)
A(1)
D(3)
D(2)
D(15)
D(14)
D(13)
D(12)
D(11)
D(10)
D(1)
D(0)
CP_CSROM E N
CP_CSRAM EN
A(9)
A(8)
A(7)
A(6)
A(5)
VRE F
HOLE_SW 1
VC 01_INT
CP_INT
UPPER_BYTE
DEBUG_DCD
CP_O EN
C P _C S R O M 2EN
CP_W EN
D(9)
D(8)
D(7)
D(6)
D(5)
D(4)
UP_SCLK
UP_CS
VC 01_R ESET
USB_IRQN
DEBUG_RI
SIMRST
DEBUG_CTS
DEBUG_DTR
DEBUG_RTS
USB_DETECT
DEBUG_DS R
A(23)
RTCALARM
SIMCLK
SIMDATA
TR_R ST
CP_TDI
CP_TCK
CP_TDO
CP_TM S
TR_RST
FLASH_RESET
CLK32K
IRDA_R X
SDS_TXD
SDS_RXD
DEBUG_TXD
DEBUG_RXD
JACK_IN
EAR_SW ITCH
UP_SDI
DSP_DB(3)
DSP_DB(4)
DSP_DB(5)
DSP_DB(6)
DSP_DB(7)
DSP_DB(8)
DSP_DB(9)
DSP_INT
DSP_IO
DSP_RW N
DSP_TCK
DSP_TDI
DSP_TDO
DSP_TM S
TR_RST
DSP_AB(3)
DSP_AB(4)
DSP_AB(5)
DSP_AB(6)
DSP_AB(7)
DSP_AB(8)
C LK 13M _TR
DSP_DB(0)
DSP_DB(1)
DSP_DB(10)
DSP_DB(11)
DSP_DB(12)
DSP_DB(13)
DSP_DB(14)
DSP_DB(15)
DSP_DB(2)
D(0:15)
A(0:20)
DSP_AB(8:0)
RST
CP_TDO
CP_TDI
CP_TM S
CP_TCK
CP_W EN
JIG_ON
SDS_RXD
SDS_TXD
DSP_AB(0)
DSP_AB(1)
DSP_AB(2)