Datasheet

使 Application Guidelines
- 7 -
Index
EDLC Series Configurations of EDLC
DREEDLC2.5VDRLEDLC2.7V
EDLCEDLC
ESR
Individual EDLC are limited to 2.5V for DRE series or 2.7V for DRL series. As many applications require higher
voltages, EDLC can be configured in series to increase the working voltage. It is important to ensure that the
individual voltage of any single EDLC does not exceed its maximum recommended working voltage as this will
result in electrolyte decomposition, gas generation, increased ESR and reduced life time.
21F
+20%20%
Vcap2 = Vsupply x (Ccap1/(Ccap1+Ccap2))
Ccap1+20%
Vsupply = 5V
Vcap2 = 5V x (1.2/(1.2+0.8)) = 3V
Capacitor voltage imbalance is caused, during charge and discharge, by differences in capacitance value and,
in steady state, by differences in capacitor leakage current. During charging, series connected capacitors will
act as a voltage divider so higher capacitance devices will receive greater voltage stress. For example, if two
1F capacitors are connected in series, one at +20% of nominal capacitance, the other at –20%, the worst-case
voltage across the capacitors is given by:
Vcap2 = Vsupply x (Ccap1/(Ccap1+Ccap2))
where Ccap1 has the +20% capacitance.
So for a Vsupply = 5V,
Vcap2 = 5V x (1.2/(1.2+0.8)) = 3V
3VEDLC±20%
From above, it can be seen that in order to avoid exceeding the EDLC surge voltage rating of 3V , the
capacitance values of series connected parts must fall in a ±20% tolerance range. Alternatively a suitable
active voltage balancing circuit can be employed to reduce voltage imbalance due to capacitance mismatch.
It should be noted that the most appropriate method of voltage balancing depends on the specific application.