Product manual

SanDisk Industrial Grade CompactFlash 5000 Product Manual
© 2007 SanDisk® Corporation 36 July 2007
4.
ATA Register Set and Protocol
SanDisk CompactFlash Memory cards can be configured as a high performance
I/O device in the following ways:
Standard PC-AT disk I/O address spaces 1F0h-1F7h, 3F6h-3F7h
(primary); 170h-177h, 376h-377h (secondary) with IRQ 14 (or other
available IRQ).
Any system decoded 16-byte I/O block using any available IRQ.
Memory space.
Communication to or from the card uses the Task File registers, which provide
all the necessary registers for control and status information. The PCMCIA
interface connects peripherals to the host using four register mapping
methods. Table 30 describes these methods in detail.
Table 30: Standard I/O Configurations
Config
Index
I/O or Memory Address Drive Description
0 Memory 0-F, 400-7FF 0 Memory Mapped
1 I/O XX0-XXF 0 I/O Mapped 16 Contiguous
Registers
2 I/O 1F0-1F7, 3F6-3F7 0 Primary I/O Mapped Drive 0
2 I/O 1F0-1F7, 3F6-3F7 1 Primary I/O Mapped Drive 1
3 I/O 170-177, 376-377 0 Secondary I/O Mapped Drive 0
3 I/O 170-177, 376-377 1 Secondary I/O Mapped Drive 1
4.1 I/O Primary and Secondary Address
Configurations
Table 31 contains configurations for primary and secondary I/O decoding.
Table 31: Primary and Secondary I/O Decoding
-REG A9-A4 A3 A2 A1 A0 -IORD=0 -IOWR=0
0 1F(17) 0 0 0 0 Even RD Data a,b Even WR Data a,b
0 1F(17) 0 0 0 1 Error Register a Features a
0 1F(17) 0 0 1 0 Sector Count Sector Count
0 1F(17) 0 0 1 1 Sector No. Sector No.
0 1F(17) 0 1 0 0 Cylinder Low Cylinder Low
0 1F(17) 0 1 0 1 Cylinder High Cylinder High
0 1F(17) 0 1 1 0 Select Card/Head Select Card/Head
0 1F(17) 0 1 1 1 Status Command
0 3F(37) 0 1 1 0 Alt Status Device Control
0 3F(37) 0 1 1 1 Drive Address Reserved
a. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Do not care) as a
word register on the combined Odd Data Bus and Even Data Bus (D15-D0). This
register may also be accessed by a pair of byte accesses to the offset 0 with -CE1
low and -CE2 high. Note that the address space of this word register overlaps the