Product manual

SanDisk Industrial Grade CompactFlash 5000 Product Manual

perform memory to memory block moves to the data register when the register

lies in memory space. Some hosts, such as the X86 processors, must increment

both the source and destination addresses when executing the memory to

memory block move instruction. Some PCMCIA socket adapters also have auto-

incrementing address logic embedded within them. This address window allows

these hosts and adapters to function efficiently. Note that this entire window

accesses the Data Register FIFO and does not allow random access to the data

buffer within the card.

4.4 True IDE Mode Addressing

When a CompactFlash Memory Card is configured in True IDE Mode the I/O

decoding is as listed in Table 34.

Table 34: True IDE Mode I/O Decoding

-CE2 -CE1 A2 A1 A0 -IORD=0 -IOWR=0

1 0 0 0 0 Even RD Data Even WR Data

1 0 0 0 1 Error Register Features

1 0 0 1 0 Sector Count Sector Count

1 0 0 1 1 Sector No. Sector No.

1 0 1 0 0 Cylinder Low Cylinder Low

1 0 1 0 1 Cylinder High Cylinder High

1 0 1 1 0 Select Card/Head Select Card/Head

1 0 1 1 1 Status Command

0 1 1 1 0 Alt Status Device Control

0 1 1 1 1 Drive Address Reserved

4.5 ATA Registers

In accordance with the PCMCIA specification, each of the following registers

that is located at an odd offset address may be accessed at its normal address

and also the corresponding even address (normal address -1) using data bus

lines (D15-D8) when -CE1 is high and -CE2 is low, unless -IOIS16 is high (not

asserted) and an I/O cycle is being performed.

4.5.1

Data Register (Address–1F0[170]; Offset 0, 8, 9)

The Data Register is a 16-bit register and is used to transfer data blocks

between the CompactFlash Memory Card data buffer and the host. This

describes the combinations of data register access and is provided to assist in

understanding the overlapped Data Register and Error/Feature Register rather

than attempt to define general PCMCIA word and byte access modes and

operations. Refer to the PCMCIA PC Card Standard Release 2.0 for definitions

of the Card Accessing modes for I/O and memory cycles.