User Manual

CompactFlash Memory Card Interface Description
CompactFlash
®
Memory Card Product Manual, Rev. 10.0 © 2002 SANDISK CORPORATION 3-15
Table 3-11. I/O Write Timing Specification
Item Symbol IEEE Symbol Min Max
Data Setup before -IOWR t
su
(IOWR) tDVIWL 60
Data Hold following -IOWR t
h
(IOWR) tlWHDX 30
-IOWR Width Time t
w
(IOWR) tlWLIWH 165
Address Setup before -IOWR t
su
A(IOWR) tAVIWL 70
Address Hold following -IOWR t
h
A(IOWR) tlWHAX 20
-CE Setup before -IOWR t
su
CE(IOWR) tELIWL 5
-CE Hold following -IOWR t
h
CE(IOWR) tlWHEH 20
-REG Setup before -IOWR t
su
REG(IOWR) tRGLIWL 5
-REG Hold following -IOWR t
h
REG(IOWR) tlWHRGH 0
-IOIS16 Delay Falling from Address t
df
IOIS16(ADR) tAVISL 35
-IOIS16 Delay Rising from Address t
dr
IOIS16(ADR) tAVISH 35
1.All timing in ns.
2.The maximum load on -IOIS16 is 1 LSTTL with 50 pF total load.
3.3.11. True IDE Mode
The following sections provide valuable information for the True IDE mode.
3.3.11.1. Deskewing
The host shall provide cable deskewing for all signals originating from the device. The device shall provide cable
deskewing for all signals originating at the host.
All timing values and diagrams are shown and measured at the connector of the selected device.
3.3.11.2. Transfer Timing
The minimum cycle time supported by devices in PIO mode 3, 4 and Multiword DMA mode 1, 2 respectively shall
always be greater than or equal to the minimum cycle time defined by the associated mode, e.g., a device supporting
PIO mode 4 timing shall not report a value less than 120 ns. The minimum cycle time defined for PIO mode 4
timings.
NOTE: PIO Modes greater than 1 are not supported in Industrial Temperature products.
Register Transfers
Figure 3-5 defines the relationships between the interface signals for register transfers.
For PIO modes 3 and above, the minimum value of t
0
is specified by word 68 in the IDENTIFY DEVICE parameter
list. Table 3-8 defines the minimum value that shall be placed in word 68.