User Manual

CompactFlash Memory Card Interface Description

CompactFlash

Table 3-17. Card Configurations

Conf5 Conf4 Conf3 Conf2 Conf1 Conf0 Disk Card Mode

0 0 0 0 0 0 Memory Mapped

0 0 0 0 0 1 I/O Mapped, Any 16 byte system decoded boundary

0 0 0 0 1 0 I/O Mapped, 1F0-1F7/3F6-3F7

0 0 0 0 1 1 I/O Mapped, 170-177/376-377

3.4.3. Card Configuration and Status Register (Address 202h in Attribute Memory)

The Card Configuration and Status Register contain information about the Card’s condition.

Table 3-18. Card Configuration and Status Register Organization

Operation D7 D6 D5 D4 D3 D2 D1 D0

Read Changed SigChg IOis8 0 0 PwrDwn Int 0

Write 0 SigChg IOis8 0 0 PwrDwn 0 0

Changed Indicates that one or both of the Pin Replacement register CRdy, or CWProt bits are set to one (1). When the

Changed bit is set, -STSCHG Pin 46 is held low if the SigChg bit is a One (1) and the CompactFlash Memory

Card is configured for the I/O interface.

SigChg This bit is set and reset by the host to enable and disable a state-change “signal” from the Status Register, the

Changed bit control pin 46 the Changed Status signal. If no state change signal is desired, this bit should be

set to zero (0) and pin 46 (-STSCHG) signal will be held high while the CompactFlash Memory Card is

configured for I/O.

IOis8 The host sets this bit to a one (1) if the CompactFlash Memory Card is to be configured in an 8 bit I/O mode.

The CompactFlash Card is always configured for both 8- and 16-bit I/O, so this bit is ignored.

PwrDwn This bit indicates whether the host requests the CompactFlash Memory Card to be in the power saving or

active mode. When the bit is one (1), the CompactFlash Card enters a power down mode. When zero (0), the

host is requesting the CompactFlash Card to enter the active mode. The PCMCIA Rdy/ -Bsy value becomes

BUSY when this bit is changed. Rdy/-Bsy will not become Ready until the power state requested has been

entered. The CompactFlash Card automatically powers down when it is idle and powers back up when it

receives a command.

Int This bit represents the internal state of the interrupt request. This value is available whether or not I/O

interface has been configured. This signal remains true until the condition that caused the interrupt request

has been serviced. If interrupts are disabled by the -IEN bit in the Device Control Register, this bit is a zero

(0).

3.4.4. Pin Replacement Register (Address 204h in Attribute Memory)

Table 3-19. Pin Replacement Register

Operation D7 D6 D5 D4 D3 D2 D1 D0

Read 0 0 CRdy/-Bsy CWProt 1 1 RRdy/-Bsy RWProt

Write 0 0 CRdy/-Bsy CWProt 0 0 MRdy/-Bsy MWProt

CRdy/-Bsy This bit is set to one (1) when the bit RRdy/-Bsy changes state. This bit can also be written by the host.

CWProt This bit is set to one (1) when the RWprot changes state. This bit may also be written by the host.