Product manual

Preliminary CompactFlash Memory Card Product Manual
SanDisk CompactFlash Memory Card Product Manual Rev. 8 © 2001 SANDISK CORPORATION
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4.3.5 Common Memory Read Timing
There are several types of memory cards, SRAM,
OTPROM, etc., and within a memory card, several
types of memory devices may be mounted. To
maintain compatibility among several types of
memory devices, read timing specifications are
common.
Table 4-3 Common Memory Read Timing Specification for all Types of Memory
Speed Version 600 ns
1,2
250 ns
3
200 ns 150 ns 100 ns
Item Symbol
IEEE
Symbol
Min Max Min Max Min Max Min Max Min Max
Read Cycle Time t
c
R tAVAV 600
2
250
5
200 150 100
Address Access
Time
4
t
a
(A) tAVQV 600
2
250
3
200 150 100
Card Enable Access
Time
t
a
(CE) tELQV 600
2
250
3
200 150 100
Output Enable
Access Time
t
a
(OE) tGLQV 300
2
125
3
100 75 50
Output Disable Time
from 0E#
t
dis
(OE) tGHQZ 150 100 90 75 50
Output Enable Time
from CE#
t
en
(CE) tELQNZ 5 5 5 5 5
Data Valid from Add
Change
4
t
v
(A) tAXQX 0 0 0 0 0
Address Setup Time
5
t
su
(A) tAVGL 100 30 20 20 10
Address Hold Time
5
t
h
(A) tGHAX 35 20 20 20 15
Card Enable Setup
Time
5
t
su
(CE) tELGL 0 0 0 0 0
Card Enable Hold
Time
5
t
h
(CE) tGHEH 35 20 20 20 15
WAIT# Valid from
OE#
5
t
v
(WT-OE) tGLWTV 100 35 35 35 35
WAIT# Pulse
Width
6
T
w
(WT) tWTLWTH
12µs 12µs 12µs 12µs 12µs
Data Setup for
WAIT# Released
6
t
v
(WT) tQVWTH 0 0 0 0 0
1. 600 ns cycle times apply for 3.3 V operating voltage.
2. 3.3 V timing for cycles >600 ns are equal to value given + (cycle time-600). All other parameters are identical.
3. 5 V timing for cycles >250 ns are equal to value given + (cycle time-250). All other parameters are identical.
4. The REG# signal timing is identical to address signal timing.
5. These timings are specified for hosts and cards which support the WAIT# signal.
6. These timings are specified only when WAIT# is asserted within the cycle.
NOTE: All timings measured at the PC Card. Skews and delays from the system driver/receiver to the PC Card must
accounted for by the system.