Product manual

Spinpoint M9TU-USB 3.0 Product Manual REV 1.0
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DISK DRIVE OPERATION
5.4.2 The Write Channel
The signal path for the Write Channel follows the reverse order of that for the Read Channel. The host transmits
data via the AT bus to the 88i1022 Interface Controller. The Buffer Controller section of the 88i1022 stores the data
in the cache. Because the data is transmitted to the drive at a rate that exceeds the rate at which the drive can write
data to the disk, data is stored temporarily in the cache. Thus, the host can present data to the drive at a rate
independent of the rate at which the drive can write data to the disk.
Upon correct identification of the target address, the data is shifted to the Sequencer, which generates and appends
an error correcting code. The Sequencer then converts the bytes of data to a serial bit stream. The AT controller also
generates a preamble field, inserts an address mark, and transmits the data to the ENDEC in the R/W IC where the
data is encoded into the LDPC format and pre-compensates for non-linear transition shift. The amount of write
current is set by the 88i1022 DSP and Interface/Disk Controller through the serial interface to the preamplifier.
The 88i1022 switches the Preamplifier and Write Driver IC to write mode and selects a head. Once the Preamplifier
and Write Driver IC receives a write gate signal, it transmits current reversals to the head, which writes magnetic
transitions on the disk.
5.5 Firmware Features
This section describes the following firmware features:
• Read Caching
• Write Caching
• Track Skewing
• Defect Management
• Automatic Defect Allocation
• ECC Correction
5.5.1 Read Caching
The Spinpoint M8U-USB 3.0 hard disk drive uses a 32MB Read Cache to enhance drive performance and
significantly improve system throughput. Use the SET FEATURES command to enable or disable
Read Caching. Read caching anticipates host-system requests for data and stores that data for faster future
access. When the host requests a certain segment of data, the cache feature utilizes a prefetch strategy to
get the data in advance and automatically read and store the following data from the disk into fast RAM.
If the host requests this data, the RAM is accessed rather than the disk.
There is a high probability that subsequent data requested will be in the cache, because more than 50 percent
of all disk requests are sequential. It takes microseconds rather than milliseconds to retrieve this cached
data. Thus Read Caching can provide substantial time savings during at least half of all disk requests. For
example, Read Caching could save most of the disk transaction time by eliminating the seek and rotational
latency delays that prominently dominate the typical disk transaction.
Read Caching operates by continuing to fill its cache memory with adjacent data after transferring data
requested by the host. Unlike a non-caching controller, the 88i1022 Interface Controller continues a read
operation after the requested data has been transferred to the host system. This read operation terminates
after a programmed amount of subsequent data has been read into the cache memory.
The cache memory consists of a 32MB sync DRAM buffer allocated to hold the data. It can be directly
accessed by the host by means of read and write commands. The unit of data stored is the logical block, or a
multiple of the 512-byte sector. Therefore, all accesses to cache memory must be in multiples of the sector
size. The following commands empty the cache:
• IDENTIFY DRIVE (ECh)
• FORMAT TRACK (50h)
• EXECUTE DRIVE DIAGNOSTIC (90h)
• READ LONG (23h)
• WRITE VERIFY (3Ch)