Product manual

Bytes 2–5
The logical block address specified in the CDB cannot be
greater than the logical block address reported by the drive
in the read capacity data else check condition.
Byte 8
If the
partial medium indicator (PMI) bit is zero, the logical
block address in the CDB is also zero. The read capacity
data returned by the drive contains the logical block address
and block length of the last logical block of the drive.
If the PMI bit is 1, the drive returns the read capacity data,
which contains the logical block address and block length
of the last logical block address, after which a substantial
delay (approximately 1 msec) in data transfer occurs. This
logical block address must be greater than or equal to the
logical block address specified in the CDB. This reported
logical block address is a track (head) boundary.
3.6.1.1 Read Capacity data
The Read Capacity data is shown below.
Bytes
Bits
7654321 0
0–3 Logical block address
4–7 Block length (00000200
H
)
Bytes 0–3
The logical block address is determined by the PMI bit in
the CDB of the Read Capacity command. The PMI bit is
described in Section 3.6.1. on page 63.
Bytes 4–7
The block length is always 512.
3.6.2 Read (10) command (28
H
)
When the drive receives the Read (10) command, it transfers data to the
initiator. This command is the same as the Read (6) command discussed
in Section 3.4.6 on page 45 except that in the CDB for the Read (10)
command, a 4-byte logical block address and a 2-byte transfer length
can be specified.
If there is a reservation access conflict, this command terminates with a
reservation conflict status and no data is read. For more information
about the reservation conflict status, see Section 3.2 on page 35.
64 Medalist Pro 2160N/2160WC Product Manual, Rev. A