SPARC/CPU-8VT Installation Guide P/N 204721 Revision AC November 2001
Copyright The information in this publication is subject to change without notice. Force Computers, GmbH reserves the right to make changes without notice to this, or any of its products, to improve reliability, performance, or design. Force Computers, GmbH shall not be liable for technical or editorial errors or omissions contained herein, nor for indirect, special, incidental, or consequential damages resulting from the furnishing, performance, or use of this material.
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Contents Table of Contents Using This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Safety Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix Sicherheitshinweise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii 1 Installation . . . . . . . . . . . . . . . . . . . . . . . .
Contents 1.5 1.6 1.7 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.5.1 Twisted Pair Ethernet Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.5.2 Serial Port A and B Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1.5.3 Keyboard/Mouse Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1.5.
Tables and Figures List of Tables and Figures Page History of Manual Publication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi Fonts, Notations and Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi Location Diagram of the SPARC/CPU-8VT (Schematic) . . . . . . . . . . . . . . . . . . . . 2 Default Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables and Figures Page Page iv Tab./Fig.
Using This Manual Using This Manual This section does not provide information on the product, but on standard features of the manual itself: • its structure, • special layout conventions, • and related documents. Audience of the Manual and Overview of the Manual This Installation Guide is intended for hard- and software developers as well as support and service engineers installing the SPARC/CPU-8VT. It is packaged and shipped together with the product.
Using This Manual Publication History of the Manual Table a History of Manual Publication Edition/ Revision Date Description 1.0 March 1997 First Print 2.0 December 1998 P2 factory option changed from 5-row to 3-row and 5-row became the standard. 3.0/AA December 2000 Safety Notes added; editorial changes 4.
Using This Manual Icons for Ease of Use: Safety Notes and Tips & Tricks There are 3 levels of safety notes used in this manual which are described below in short by displaying a typical layout example. Be sure, to always read and follow the safety notes of a section first – before acting as documented in the other parts of the section. CAUTION Dangerous situation: injuries to people and severe damage to objects possible.
Using This Manual Page viii SPARC/CPU-8VT
Safety Notes This section provides safety precautions to follow when installing, operating, and maintaining the SPARC/CPU-8VT. For your protection, follow all warnings and instructions found in the following text. This Installation Guide provides the necessary information to install and handle the SPARC/CPU-8VT. As the product is complex and its usage manifold, we do not guarantee that the given information is complete. If you need additional information, ask your Force Computers representative.
Installation Electrostatic discharge and incorrect board installation and uninstallation can damage circuits or shorten their life. Therefore: • Before touching integrated circuits, make sure that you are working in an ESD-safe environment. • When plugging the board in or removing it, do not press on the front panel but use the handles. • Before installing or uninstalling an additional device or module, read the respective documentation.
RJ-45 Connector An RJ-45 connector is used for both telephone and twisted pair Ethernet (TPE) connectors. Mismatching the two connectors may destroy your telephone as well as your SPARC/CPU-8VT. Therefore: • TPE connectors near your working area have to be clearly marked as network connectors. • TPE bushing of the system has to be connected only to safety extra low voltages (SELV) circuits. • The length of the electric cable connected to a TPE bushing must not exceed 100 meter.
xii SPARC/CPU-8VT
Sicherheitshinweise Dieser Abschnitt enthält Sicherheitshinweise, welche bei der Installation, dem Betrieb und der Wartung des SPARC/CPU-8VT zu beachten sind. Beachten Sie zu Ihrem Schutz alle folgenden Warnhinweise und Anleitungen. Dieses Installationshandbuch enthält alle notwendigen Informationen zur Installation und zum Betrieb des SPARC/CPU-8VT.
Um eine ausreichende Abschirmung zu gewährleisten, darf das Board nur mit einer Blindblende oder mit einer installierten PCMCIA-Karte betrieben werden. Installation Elektrostatische Entladung und unsachgemäße Installation und Ausbau des Boards kann Schaltkreise beschädigen oder ihre Lebensdauer verkürzen. Deswegen sind folgende Punkte vor der Installation zu überprüfen: • Bevor Sie integrierte Schaltkreise berühren, vergewissern Sie sich, dass Sie in einem ESD-geschützten Bereich arbeiten.
Benutzen Sie bei der Erweiterung ausschließlich von Force Computers empfohlene Komponenten und Systemteile. Ansonsten sind Sie für die Auswirkungen auf EMV und die möglicherweise geänderte Funktionalität des Produktes verantwortlich. RJ-45 Stecker RJ-45 Stecker werden sowohl für Telefonanschlüsse als auch für Twistedpair-Ethernet (TPE) verwendet. Die Verwechslung solcher Anschlüsse kann sowohl das Telefonsystem als auch das Board zerstören.
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Installation Installation Prerequisites and Requirements 1 Installation 1.1 Installation Prerequisites and Requirements IMPORTANT i 1.1.1 Before powering up • check this section for installation prerequisites and requirements • and check the consistency of the current switch setting (see section 1.2 “Switch Settings” on page 3). Requirements The installation requires only • a power supply • and a VMEbus backplane with P1 and P2 connectors.
Installation Prerequisites and Requirements Figure 1 Installation Location Diagram of the SPARC/CPU-8VT (Schematic) Front panel SERIAL SCSI ETH-TP1 ETH-TP2 SYS RUN B A A KBD UL BM MODE DIAG A B O R T R E S E T B Top J59 J58 Memory module #2 Memory module #1 L2 cache bank #1 TurboSPARC L2 cache bank #1 LCA 4003 NCR89C100 NCR89C100 MACIO MACIO #1 #2 NCR89C105 SLAVIO Boot flash memory FGA 5000 B3 B2 B1 J15 J16 SW7 P2 (#2) RTC/NVRAM SBus slot #1 at P3 SBus slot #2 at P4 P1 P2
Installation 1.2 Switch Settings Switch Settings The following table lists the functions and the default settings of all switches shown in figure 1 “Location Diagram of the SPARC/CPU-8VT (Schematic)” on page 2. IMPORTANT i • Before powering up the board check the current switch settings for consistency. • Do not switch during operation. Table 1 Default Switch Settings Name and default setting Function Serial A config.
Switch Settings Installation Table 1 Default Switch Settings (cont.
Installation Switch Settings Table 1 Default Switch Settings (cont.) Name and default setting ON 1 2 3 4 ON 1 2 3 4 1.2.1 Function SW8-1 OFF Automatic VMEbus slot-1 detection OFF = Automatic detection of VME Slot 1 function ON = Automatic detection of VME slot 1 function disabled. Use SW8-2 instead.
Power Up 1.3 Installation Power Up The initial power up can easily be done by connecting a terminal to TTYA (serial port A). The advantage of using a terminal is that no frame buffer, monitor, or keyboard is used for initial power up, which facilitates a simple start-up. IMPORTANT i 1.3.1 For the initial power up, do not connect a keyboard to the board when using TTYA (serial port A). For more detailed information on booting the system, see section 1.9.1 “Boot the System” on page 23.
Installation SYSRESET Output 1.3.3 Power Up A SYSRESET signal is generated to the VMEbus when an on-board local SBus reset occurs on the SPARC/CPU-8VT (e.g. the front panel reset key is toggled or power failure is detected). This SYSRESET signal can be disabled by setting switch SW7-3 to ON. As written in the VME specification, each board must assert SYSRESET output at power-up when the power supply reaches 3 V until power is stable. This feature is enabled by default (SW7-1 is OFF).
Power Up 1.3.8 Installation Floppy Interface or SCSI #2 Availability on P2 The availability of both the floppy and SCSI #2 devices at the same time depends on the availability of a 5-row P2 connector. When using a 3-row P2 connector (factory option), you have the choice of either the floppy or the SCSI #2 on P2.
Installation 1.3.9 SCSI Configuration Network Interface Selection (NIS) for Ethernet The Ethernet is selected either via the twisted pair connector or the AUI (Attachment Unit Interface). • When you boot your system and a connection exists with an AUI network, then the AUI is automatically selected, i.e. when you have a successful connection with a network, the AUI is used. • When you have no connection with the network, then the twisted pair is selected.
SCSI Configuration Installation • cable connector to the VMEbus P2 connector, • cable connector to the front panel, • or a cable connector to the VMEbus P2 connector and the front panel. Each of the following configuration descriptions starts with identifying the SCSI #1 bus configuration being covered and ends with defining the correct switch setting corresponding to the considered configuration. Configuration 1 • The configuration 1 is covered by the default switch setting.
Installation SCSI Configuration In this configuration: – SW6-1 must be set to OFF = SCSI-Term front panel automatic (default “OFF”, see page 4) – and SW6-2 must be set to OFF (default “OFF”, see page 4).
SCSI Configuration Configuration 1 Installation • The configuration 1 is covered by the default switch setting: The board is located at an endpoint of the SCSI #2 bus, i.e., the SCSI #2 bus is extended via the VMEbus P2 connector: Front panel CPU board with MACIO 2 VMEbus backplane SW6-3 = OFF In this configuration SW6-3 must be set to OFF = enabled termination (default “OFF”, see page 4). Configuration 2 • In configuration 2 the CPU board is not located at an endpoint of the SCSI #2 bus, i.e.
Installation 1.5 Connectors Connectors The SPARC/CPU-8VT connectors are listed in the following table. Table 2 1.5.
Connectors 1.5.2 Installation Serial Port A and B Connector Pinout The following figure shows the pinout of the serial port connector. Figure 4 Serial Port A and B Connector Pinout 1 5 10 15 20 25 26 1.5.3 N.C. (none) TDA_A (output, Transmit Data) RD_A (input, Receive Data) RTS_A (output, Request to Send) CTS_A (input, Clear To Send) DSR_A (input, Data Set Ready) SG_A (none, Signal Ground) DCD_A (input, Data Carrier Detect) N.C. (none) N.C.
Installation 1.5.4 Connectors VME P2 Connector Pinout The SCSI #2 interface is an alternative to the FDC interface on row C. The signals for rows Z and D are not available on the 3-row P2 connector (factory option).
IOBP-10 1.6 Installation IOBP-10 IOBP-10 and IOBP-DS can be plugged to the back side of a VMEbus backplane. They only fit into 3-row backplanes. Any attempt to attach them to a 5-row backplane connector might damage the backplane. The IOBP-10 is an I/O back panel on VMEbus P2 with flat cable connectors for SCSI, serial I/O, Centronics/floppy interface, and a micro D-Sub connector for the Ethernet #1 interface. The Centronics interface on the IOBP-10 is not supported by the SPARC/CPU-8VT.
Installation 1.6.2 IOBP-10 IOBP-10 Connector Pinouts Figure 8 IOBP-10 P1 Pinout A Figure 9 5 10 15 20 25 30 32 FPY DENSEL FPY DENSENSE N.C. FPY INDEX FPY DRVSEL N.C. N.C.
IOBP-10 Figure 10 Installation IOBP-10 P3 Pinout (Floppy) FPY EJECT GND GND GND GND GND GND GND GND GND GND GND GND N.C. GND GND GND Figure 11 FPY DENSEL FPY DENSENS N.C. FPY INDEX FPY DRVSEL N.C. N.C.
Installation 1.7 IOBP-DS IOBP-DS IOBP-10 and IOBP-DS can be plugged to the back side of a VMEbus backplane. They only fit into 3-row backplanes. Any attempt to attach them to a 5-row backplane connector might damage the backplane. The IOBP-DS is an I/O back panel on VMEbus P2 with flat cable connectors for SCSI #1, SCSI #2, serial I/O, keyboard/mouse, and a micro D-Sub connector for the Ethernet #1 interface (AUI). This back panel can be plugged into the VMEbus P2 connector.
IOBP-DS 1.7.2 Installation IOBP-DS Connector Pinouts Figure 14 IOBP-DS P2 Pinout A Figure 15 5 10 15 20 25 30 32 SCSI#2-D0 SCSI#2-D1 SCSI#2-D2 SCSI#2-D3 SCSI#2-D4 SCSI#2-D5 SCSI#2-D6 SCSI#2-D7 SCSI#2-DP SCSI#2-ATN SCSI#2-BSY SCSI#2-ACK SCSI#2-RST SCSI#2-MSG SCSI#2-SEL SCSI#2-CD SCSI#2-REQ SCSI#2-IO ETH#1_POW TERMPWD#2 GND ETH#1_REC+ ETH#1_REC– ETH#1_TRA+ ETH#1_TRA– ETH#1_COL+ ETH#1_COL– GND TXD_B RXD_B DTR_B DCD_B IOBP-DS J1 Pinout (SCSI #1) GND GND GND GND GND GND GND GND GND GND GND GND N.C.
Installation Figure 16 IOBP-DS IOBP-DS J2 Pinout (SCSI #2) 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 GND GND GND GND GND GND GND GND GND GND GND GND N.C. GND GND GND GND GND GND GND GND GND GND GND GND Figure 17 5 10 15 GND Collision+ Transmit Data+ GND Receive Data+ GND N.C. N.C. Collision– Transmit Data– GND Receive Data– +12VDC GND N.C.
Ethernet Address and Host ID 1.8 Installation Ethernet Address and Host ID In order to see the Ethernet address and host ID, type the following command at the prompt: ok banner The information below explains how the SPARC/CPU-8VT Ethernet address and the host ID are determined.
Installation 1.9 OpenBoot Firmware OpenBoot Firmware The following tasks are described in this section: • Boot the system • Run diagnostics • Display system information • Reset the system • OpenBoot help For detailed information concerning OpenBoot, see the OPEN BOOT PROM 2.0 MANUAL SET. 1.9.1 Boot the System The most important function of OpenBoot firmware is the booting of the system. Booting is the process of loading and executing a stand-alone program such as the operating system.
OpenBoot Firmware Installation [device-specifier] The name (full path or alias) of the boot device. Typical values are cdrom, disk, floppy, net, or tape. [filename] The name of the program to be booted. filename is relative to the root of the selected device. If no filename is specified, the boot command uses the value of boot-file NVRAM parameter. The NVRAM parameters used for booting are described in the following section. [-a] -a prompt interactively for the device and name of the boot file.
Installation Table 3 1.9.2 OpenBoot Firmware Device Alias Definitions (cont.) Alias Description cdrom CD-ROM partition d, SCSI-ID 6 net Ethernet floppy Floppy drive NVRAM Boot Parameters The OpenBoot firmware holds configuration parameters in NVRAM. At the Forth monitor prompt, type printenv to see a list of all available configuration parameters.
OpenBoot Firmware 1.9.3 Installation Diagnostics At power-on or after reset the OpenBoot firmware executes POST. If the NVRAM configuration parameter diag-switch? is true for each test, a message is displayed on a terminal connected to the serial I/O port A. If the system does not work correctly, error messages are displayed indicating the problem. After POST the OpenBoot firmware boots an operating system or enters the Forth monitor, if the NVRAM configuration parameter auto-boot? is false.
Installation All SCSI busses OpenBoot Firmware To test all the SCSI busses installed in the system, enter the following (The actual response depends on the devices on the SCSI busses): ok probe-scsi-all /iommu@0,10000000/sbus@0,10001000/esp@2,100000 Target 0 Unit 0 Disk SEAGATE ST31230W 0456 /iommu@0,10000000/sbus@0,10001000/espdma@4,8400000/esp@4,8800000 Target 5 Unit 0 Removable Read Only device TOSHIBA CD-ROM XM-4101TA1084 ok Single device To test a single installed device enter: ok test device-spe
OpenBoot Firmware Installation • If the CPU board works correctly, the memory is erased and tested and the ok prompt will appear. • If the PROM or the on-board memory does not work, one of several potential error messages indicating the problem will appear. Clock To test the clock function enter: ok watch-clock Watching the ‘seconds’ register of the real time clock chip. It should be ‘ticking’ once a second. Type any key to stop. 22 ok The system responds by incrementing a number once a second.
Installation OpenBoot Firmware The following table lists these commands: Table 6 1.9.5 Commands to display System Information Command Description banner Displays system banner show-sbus Displays list of installed and probed SBus devices .enet-addr Displays current Ethernet address .idprom Displays ID PROM contents, formatted .traps Displays a list of SPARC trap types .
OpenBoot Firmware 1.9.
Installation OpenBoot Firmware ok help memory Category: Memory access dump ( addr length -- ) display memory at addr for length bytes fill ( addr length byte -- ) fill memory starting at addr with byte move ( src dest length -- ) copy length bytes from src to dest address map? ( vaddr -- ) show memory map information for the virtual address l? ( addr -- ) display the 32-bit number from location addr w? ( addr -- ) display the 16-bit number from location addr c? ( addr -- ) display the 8-bit number from lo
OpenBoot Firmware Page 32 Installation SPARC/CPU-8VT
Product Error Report PRODUCT: SERIAL NO.: DATE OF PURCHASE: ORIGINATOR: COMPANY: POINT OF CONTACT: TEL.: EXT.: ADDRESS: PRESENT DATE: AFFECTED PRODUCT: AFFECTED DOCUMENTATION: ❏ HARDWARE ❏ SOFTWARE ❏ SYSTEMS ❏ HARDWARE ❏ SOFTWARE ❏ SYSTEMS ERROR DESCRIPTION: THIS AREA TO BE COMPLETED BY FORCE COMPUTERS: DATE: PR#: RESPONSIBLE DEPT.: ❏ MARKETING ❏ PRODUCTION ENGINEERING ➠ ❏ BOARD ❏ SYSTEMS ✉ Send this report to the nearest Force Computers headquarter listed on the address page.
