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ATA Interface Reference Manual 36111-001, Rev.
© 1993 Seagate Technology, Inc. All rights reserved Publication Number: 36111-001, Rev. C Seagate®, Seagate Technology®, and the Seagate logo are registered trademarks of Seagate Technology, Inc. Other product names are registered trademarks or trademarks of their owners. Seagate reserves the right to change, without notice, product offerings or specifications. No part of this publication may be reproduced in any form without written permission from Seagate Technology, Inc.
ATA Interface Reference Manual, Rev. C iii Contents 1.0 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 Advantages of the ATA interface . . . . . . . . . . . . . . 1 1.2 Origins and implementation history . . . . . . . . . . . . . 2 1.3 Nomenclature and conventions . . . . . . . . . . . . . . . 2 2.0 ATA cables and connectors . . . . . . . . . . . . . . . . . 3 2.1 Connector used on 5.25- and 3.5-inch drives . . . . . . . . 3 2.2 Connector used on 2.5-inch drives . . . .
iv ATA Interface Reference Manual, Rev. C 5.1 Logical block addressing . . . . . . . . . . . . . . . . . . 25 5.2 ATA Command Types and Protocols . . . . . . . . . . . 26 5.2.1 PIO read commands . . . . . . . . . . . . . . . . . 27 5.2.2 PIO write commands . . . . . . . . . . . . . . . . . 28 5.2.3 DMA data transfer commands . . . . . . . . . . . . 30 5.2.4 Nondata commands . . . . . . . . . . . . . . . . . . 31 5.3 ATA interface command summaries . . . . . . . . . . . . 32 5.3.
ATA Interface Reference Manual, Rev. C 5.4.21 Write Sectors command v . . . . . . . . . . . . . . . 54 5.4.22 Write Verify . . . . . . . . . . . . . . . . . . . . . . 55 5.5 ATA standard power management commands . . . . . . . 55 5.5.1 Check Power Mode command . . . . . . . . . . . . . 56 5.5.2 Idle command . . . . . . . . . . . . . . . . . . . . . 56 5.5.3 Idle Immediate command . . . . . . . . . . . . . . . 58 5.5.4 Sleep command . . . . . . . . . . . . . . . . . . . . 58 5.5.5 Standby . . . . . . .
vi ATA Interface Reference Manual, Rev. C Figures Figure 1. Pin assignments for the 40-pin male ATA interface connector used on 5.25- and 3.5-inch drives . . . . . . . . . . . 3 Figure 2. 40-pin male ATA interface connector for 5.25- and 3.5-inch drives . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 3. 40-pin female ATA interface connector for cables attached to 5.25- and 3.5-inch drives . . . . . . . . . . . . . . . . 4 Figure 4.
ATA Interface Reference Manual, Rev. C 1 1.0 Introduction This manual describes Seagate Technology’s implementation of the AT Attachment (ATA) interface, an intelligent hard disc drive interface for use in personal computer systems. This manual includes supported ATA interface commands, command execution, translation methodology, caching, power management, signal conventions, line specifications, and interpretations of error conditions.
2 ATA Interface Reference Manual, Rev. C ing specific configuration of the drive’s features for specialized applications. 1.2 Origins and implementation history The ATA interface has evolved rapidly since its initial design by Compaq Corporation. After refining the basic ATA interface concepts and circuitry, Compaq Corporation worked with Imprimis (now a part of Seagate) to build the first ATA interface drive. At this stage, the interface was far from being an accepted standard.
ATA Interface Reference Manual, Rev. C 3 2.0 ATA cables and connectors The standard ATA interface cable is a 40-conductor nonshielded cable. The cable should be no more than 18 inches (457 mm) long, with connectors that provide strain relief and are keyed at pin 20. Two types of connectors are used on Seagate’s ATA-capable drives: a 40-pin connector for 5.25and 3.5-inch drives, and a 50-pin connector for 2.5- and 1.8-inch drives. 2.1 Connector used on 5.25- and 3.
4 ATA Interface Reference Manual, Rev. C Dimensions are in inches 0.100 ± 0.010 0.70 ± 0.010 0.235 ± 0.025 0.025 ± 0.002 0.230 ± 0.003 0.025 ± 0.002 0.100 typ 0.160 0.070 ± 0.010 1.90 2.00 Figure 2. 40-pin male ATA interface connector for 5.25- and 3.5-inch drives Dimensions are in inches (mm) 2.00 (50.80) Strain relief 1.90 (48.26) Triangle indicates position of pin 1 0.140 (3.556) 0.230 ± 0.003 (5.84 ± 0.076) 2.00 (50.80) 0.060 (1.524) 0.025 ± 0.002 (0.635 ± 0.051) Polarizing key 0.
ATA Interface Reference Manual, Rev. C 5 2.2 Connector used on 2.5-inch drives The ATA connector on 2.5-inch drives has 50 pin positions. In addition to the key pin, one pair of pins is removed, and the four end pins are used as jumpers for master/slave configurations, as shown in Figure 4. This leaves 44 pins to supply power and conduct signals to and from the drive. The signal pins (1 through 40) are assigned the same signals as in the 40-pin connector used for 5.25- and 3.5-inch drives.
6 ATA Interface Reference Manual, Rev. C Dimensions are in inches (mm) 0.079 ± 0.003 (2.00 ± 0.08) 0.039 ± 0.003 (0.99 ± 0.08) 0.152 ± 0.005 (3.86 ± 0.13) 0.157 (4.00) 0.079 ± 0.003 (2.00 ± 0.08) 0.020 ± 0.002 (0.51 ± 0.05) 0.020 ± 0.002 (0.51 ± 0.05) 0.039 ± 0.003 (0.99 ± 0.08) Master/slave jumpers 0.161 (4.09) ref 0.158 ± 0.003 (4.00 ± 0.08) 1.654 (42.01) 2.212 (56.18) Figure 5. 50-pin male ATA interface connector for 2.
ATA Interface Reference Manual, Rev. C 7 2.3 System configurations Seagate recommends using the ATA interface in one of the following configurations: • If the system motherboard has its own ATA connector, then you can connect the drive interface cable directly to the system motherboard, as shown in Figure 6. • If the system does not have a built-in ATA connector, then attach the interface cable to a Seagate ST07A or ST08A host adapter installed in a system expansion slot.
ATA Interface Reference Manual, Rev. C 9 3.0 ATA interface signals Figure 8 summarizes the signals used by the I/O bus. Arrows indicate signal directions. The PDIAG– and DASP– signals are used in some systems for communication between the master and slave drive. Each signal is described in greater detail in section 3.1.
10 ATA Interface Reference Manual, Rev. C 3.1 Signal / Pin descriptions Note. Not all Seagate drives support the full complement of ATA signals listed below. To determine the complete set of signals that are supported by a particular Seagate drive, see the product manual for that drive. Pin # Signal name Description 01 RESET– Reset signal from the host. 02 Ground Grounding pin 03–18 Host Data 0 Data lines to and from host.
ATA Interface Reference Manual, Rev. C 11 Pin # Signal name Description 31 INTRQ A tristate signal used to interrupt the host system. Asserted only when the drive has a pending interrupt, the drive is selected, and the host has cleared nIEN in the Device Control register. If nIEN=1, or the drive is not selected, this output is in a high-impedance state, regardless of the presence or absence of a pending interrupt.
12 ATA Interface Reference Manual, Rev. C 3.2 Interface handshaking The main handshaking signals between the drive and the host are the busy bit (BSY) and the data request bit (DRQ) (in the status register) and the interrupt (INTRQ) signal. They can be set in one of the following ways: • Any reset will cause BSY to be set. • Writing a command to the command register will also set BSY. The BSY bit is used to indicate that the controller is busy and should not be accessed.
ATA Interface Reference Manual, Rev. C 13 4.0 ATA interface I/O registers The drive communicates with the host system through an I/O register that routes the input and output data between registers. These registers are selected by codes on the CS1FX–, CS3FX–, DA2, DA1, DA0, DIOR– (read) and DIOW– (write) lines from the host. The I/O register routes data between 14 registers.
14 ATA Interface Reference Manual, Rev. C Function / Register selected Signal name CS1FX– CS3FX– DA2 DA1 DA0 DIOR– DIOW– PC-AT I/O port address Control Block registers 0 1 0 X X Data bus high impedance Not used 3F0–3F3 0 1 1 0 X Data bus high impedance Not used 3F4–3F5 0 1 1 1 0 Alternate Status register Device Control register 3F6 0 1 1 1 1 Drive Address register Not used 3F7 4.
ATA Interface Reference Manual, Rev. C 15 4.2 Command register CS1FX– = 1 DA2 = 1 CS3FX– = 0 DA1 = 1 DA0 = 1 Mode = Write Only PC-AT I/O port address: 1F7H This eight-bit register contains the host command. When this register is written, the drive immediately begins executing the command. The host must ensure that the BSY bit in the Status register is set to 0. All other setup registers must be written to (with appropriate values) before the command register can be written. Refer to Section 5.3.
16 ATA Interface Reference Manual, Rev. C 4.4 Cylinder Low register CS1FX– = 1 DA2 = 1 CS3FX– = 0 DA1 = 0 DA0 = 0 Mode = Read/Write PC-AT I/O port address: 1F4H This register contains the eight least significant bits of the starting cylinder address for any disc access. At the completion of a command, this register is updated to reflect the current cylinder address. With logical block addressing, this register contains bits 15 through 8 of the LBA. 4.
ATA Interface Reference Manual, Rev. C 17 The Device Control register contains the two control bits shown below (X indicates bits that are not used): Bit 7 6 5 4 3 2 1 0 Name X X X X 1 SRST nIEN 0 nIEN is the enable bit for the drive interrupt to the host. When this bit is set to 0 and the drive is selected, the host interrupt, INTRQ, is enabled, through a tristate buffer, to the host.
18 ATA Interface Reference Manual, Rev. C example, if nHS3– through nHS0– are 1 1 0 0, respectively, Head 3 is selected. nDS1 is the drive select bit for drive 1 (the slave drive), and should be active low when drive 1 is selected. nDS0 is the drive select bit for drive 0 (the master drive), and should be active low when drive 0 is selected. 4.8 Drive/Head register The host selects between the master and slave drives based on the DRV bit in the drive/head register.
ATA Interface Reference Manual, Rev. C 19 4.9 Error register CS1FX– = 1 DA2 = 0 CS3FX– = 0 DA1 = 0 DA0 = 1 Mode = Read Only PC-AT I/O port address: 1F1H This register contains the status from the last command executed by the drive, or it may contain a diagnostic code. At the completion of any command except Execute Drive Diagnostic, the contents of this register are valid when ERR=1 in the Status register.
20 ATA Interface Reference Manual, Rev. C 4.10 Features register CS1FX– = 1 DA2 = 0 CS3FX– = 0 DA1 = 0 DA0 = 1 Mode = Write Only PC-AT I/O port address: 1F1H This register is used by the Set Features command to enable and disable special options, as defined in Section 5.4.14 (The Set Features command). 4.
ATA Interface Reference Manual, Rev. C 21 4.13 Status register CS1FX– = 1 DA2 = 1 CS3FX– = 0 DA1 = 1 Mode = Read Only DA0 = 1 PC-AT I/O port address: 1F7H This register contains either the drive status or the controller status. It is updated at the completion of each command. If the host reads this register while an interrupt is pending, it clears the interrupt.
22 DRQ ATA Interface Reference Manual, Rev. C is the data request bit. It is set to 1 when the drive is ready to transfer a word or byte of data between the host and the data port. The drive is busy whenever DRQ or BSY bits are set to 1. When the DRQ bit is set to 1, the host may read or write any of the registers including the Command register. CORR is the corrected data bit. It is set to 1 when a correctable data error has been encountered and the data has been corrected.
ATA Interface Reference Manual, Rev. C 23 4.14 Reset response When the drive is reset, either by the host reset interface pin (RESET) or by the host software reset bit (SRST) in the Device Control register, the drive asserts BSY immediately. Once the reset has been removed and the drive has been re-enabled, with BSY still asserted, the drive: 1. Initializes the hardware 2. Clears programmed drive parameters and reverts to the defaults 3. Loads the command block registers with their initial values 4.
ATA Interface Reference Manual, Rev. C 25 5.0 ATA interface commands All ATA commands are decoded from the command register in the command block. The host sets up all necessary parameters and enables INTRQ (if used by the host) through other registers of the command block before the command code is written to the command register. The drive begins to execute a command immediately after the command register is written.
26 ATA Interface Reference Manual, Rev. C – Words 60 and 61 contain the total number of sectors available on the drive. This number remains constant for the life of the drive, and is unaffected by the current translation mode. This value may be greater than the number of sectors implied by Words 1, 3, and 6. There are no translation modes that allow Cylinder/Head/Sector (CHS) access to more sectors than specified by words 60 and 61.
ATA Interface Reference Manual, Rev. C 27 5.2.1 PIO read commands The PIO read command group includes the Identify Drive, Read Buffer, Read Long, Read Multiple and Read Sectors commands. The Identify Drive and Read Buffer commands each transfer a single block of 512 bytes. The Read Long command transfers a single block of 512 bytes plus 4 or more ECC bytes. The Read Multiple command transfers one or more blocks of data where the size of each block is a multiple of 512 bytes.
28 ATA Interface Reference Manual, Rev. C continued from previous page Step Event Process BSY DRQ INTRQ 4 — BSY=0 DRQ=1 Assert 5 BSY=0 DRQ=1 Negate 6 Transfer Read status first block Transfer data BSY=0 DRQ=1 — 7 — BSY=1 — — If Error Status is presented, the drive is prepared to transfer data, and it is at the host’s discretion that the data is transferred. The following example shows a PIO read command with an error indicated on the first block.
ATA Interface Reference Manual, Rev. C 29 3. The drive sets BSY and prepares for data transfer. 4. When the drive is ready to accept a block of data, it sets DRQ and clears BSY. When the host detects DRQ is set to 1, the host writes one block of data from the Data register. 5. The drive clears DRQ and sets BSY. 6. When the drive has completed processing of the block, it clears BSY and asserts INTRQ. If transfer of another block is required, the drive also sets DRQ. 7.
30 ATA Interface Reference Manual, Rev. C In contrast, the table below illustrates a PIO write command with an error indicated on the first block. Step Event Process BSY DRQ INTRQ 1 — Setup BSY=0 — — 2 — Issue command BSY=0 — — 3 — — BSY=1 — — Transfer data BSY=0 DRQ=1 — BSY=1 — BSY=0 DRQ=1 Assert BSY=0 DRQ=1 Negate 4 5 6 7 Transfer — first block — Read status — 5.2.3 DMA data transfer commands The DMA data transfer commands are Read DMA and Write DMA.
ATA Interface Reference Manual, Rev. C 31 or all of the data during this step. During this step, the status of DRQ is not specified (indicated by x in the diagram). 6. When the data transfer has completed, the drive clears BSY and asserts INTRQ. 7. After detecting INTRQ, the host resets the slave-DMA channel. 8. The host reads the Status register. In response to the Status register being read, the drive negates INTRQ. The following table shows a DMA Data Transfer command with no error.
32 ATA Interface Reference Manual, Rev. C The following table illustrates a typical nondata command: Step Process BSY DRQ INTRQ 1 Setup BSY=0 — — 2 Issue command BSY=0 — — 3 — BSY=1 — — 4 — BSY=0 — Assert 5 Read status BSY=0 — Negate An important subset of the nondata commands are the power management commands, all of which are optional within the ATA command specification. These commands are treated in separate sections in the text and tables that follow. 5.
ATA Interface Reference Manual, Rev. C 33 5.3.1 Command registers The following table summarizes the contents of the Command registers following implementation of the various ATA interface commands.
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36 ATA Interface Reference Manual, Rev. C 5.3.2 Commands and error messages The following table summarizes the contents of the Error and Status registers after execution of the various ATA interface commands. Bullets indicate valid bits.
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ATA Interface Reference Manual, Rev. C 39 • If the slave has not asserted PDIAG–, indicating a failure, the master will append 80H to its own diagnostic status. • Both drives will execute diagnostics. • If slave diagnostic failure is detected when master drive status is read, slave status is obtained by setting the DRV bit, and reading status. If the slave fails diagnostics, the master compares (ORs) 80H with the current status of the master and loads the appropriate code into the Error register.
40 ATA Interface Reference Manual, Rev. C If the drive supports reformatting of headers as well as data fields, the data block is interpreted as shown in the following table: DD15———-DD0 First sector descriptor DD15———-DD0 sector : : : : Last descriptor Remainder of buffer filled with zeros One 16-bit word represents each sector, the words being contiguous from the start of a sector. Any words remaining in the buffer after the representation of the last sector are filled with zeros.
ATA Interface Reference Manual, Rev. C 41 Identify Drive Command Word Bit Description 0 11 1 = rotational speed tolerance is > 0.
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ATA Interface Reference Manual, Rev. C 45 Identify Drive Command Word Bit Description 60–61 — Total number of user-addressable sectors (LBA mode only; if the drive supports LBA mode, these words reflect the total number of user-addressable sectors. This value does not depend on the current drive geometry.
46 ATA Interface Reference Manual, Rev. C 5.4.4 Initialize Drive Parameters command This command (command code 91H) sets the number of sectors per track and the number of heads, minus 1, per cylinder for the translation mode the host would like to use. Upon receipt of the command, the drive sets BSY, saves the parameters, clears BSY, and generates an interrupt.
ATA Interface Reference Manual, Rev. C 47 5.4.6 Read Buffer command The Read Buffer command (command code E4H) enables the host to read the current contents of the drive’s sector buffer. The Read Buffer and Write Buffer commands must be synchronized so that sequential Write Buffer and Read Buffer commands access the same 512 bytes within the buffer. A Read Buffer command that is not immediately preceded by a Write Buffer command gives unpredictable data. 5.4.
48 ATA Interface Reference Manual, Rev. C operations are supported. See also the Identify Drive and Set Features commands. 5.4.9 Read Multiple command This command (command code C4H) is similar to the Read Sectors command. Interrupts are not generated on every sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple Mode command.
ATA Interface Reference Manual, Rev. C 49 5.4.10 Read Sectors command This command (command codes 20H and 21H) reads from 1 to 256 sectors as specified in the Sector Count register (a sector count of 0 requests 256 sectors), beginning at the specified sector. If the drive is not already on the desired track, an implied seek is performed. Once on the desired track, the drive searches for the requested sector.
50 ATA Interface Reference Manual, Rev. C 5.4.12 Recalibrate command This command (command code 1xH, where x can by any value from 0H to FH) moves the read/write heads from anywhere on the disc to cylinder 0. Upon receipt of the command, the drive sets BSY and issues a seek to cylinder zero. The drive then waits for the seek to complete before updating status, clearing BSY and generating an interrupt. If the drive cannot reach cylinder 0, a Track Not Found error is posted.
ATA Interface Reference Manual, Rev. C 51 Byte Description 44H Use maximum length of ECC (> 4 bytes) on read long/write long commands (the maximum ECC length varies among drives).
52 ATA Interface Reference Manual, Rev. C 5.4.15 Set Multiple Mode command This command (command code C6H) enables the drive to perform Read and Write Multiple operations and establishes the block count for these commands. The Sector Count register is loaded with the number of sectors per block. Drives normally support block sizes of 2, 4, 8, and 16 sectors. However, other block size values may also be supported, depending on the size of the drive’s buffer.
ATA Interface Reference Manual, Rev. C 53 • The drive issues only one interrupt per command to indicate that data transfer has ended and drive status is available. Any error encountered during Write DMA execution results in the termination of data transfer. The drive issues an interrupt to indicate that data transfer has terminated and status is available in the Error register. The error posting is the same as that of the Write Sectors command.
54 ATA Interface Reference Manual, Rev. C disabled, the Write Multiple operation is rejected with an aborted command error. Disc errors encountered during Write Multiple commands are posted after the attempted disc write of the block or partial block transferred. The Write command ends with the sector in error, even if it was in the middle of a block. Subsequent blocks are not transferred in the event of an error.
ATA Interface Reference Manual, Rev. C 55 Upon command completion, the Command Block registers contain the cylinder, head, and sector number of the last sector written. If an error occurs during a write of more than one sector, writing terminates at the sector where the error occurs. The Command Block registers contain the cylinder, head, and sector number of the sector where the error occurred.
56 ATA Interface Reference Manual, Rev. C Standby mode, the buffer remains enabled, the heads are parked and the spindle is at rest. The drive accepts all commands, and returns to Active mode any time disc access is necessary. Sleep mode. The drive enters Sleep mode when a Sleep Immediate command has been received from the host. The heads are parked and the spindle is at rest. The drive leaves Sleep mode when a Hard Reset or Soft Reset command is sent from the host.
ATA Interface Reference Manual, Rev. C 57 Set Standby Timer Value Set Idle Timer Value Start Idle and Standby Timers 97H /E3H Soft Reset Sect Cnt = FF Set Idle Timer Value 96H /E2H Set Standby Timer Value FAH STANDBY Mode 96H /E2H FDH 98H /E5H 95H /E1H /F8H 94H /E0H or Standby Timer Expired 99H /E6H Sect Cnt = 00 SLEEP Mode Sect Cnt = FF Figure 9.
58 ATA Interface Reference Manual, Rev. C interrupt is generated even though the drive may not have completed its transition to Idle mode. If the Sector Count register is not zero, then the automatic power-down sequence is enabled and the timer begins counting down immediately. The duration of the standby timer depends on the value in the Sector Count register, which is in units of 5 seconds (for example, 1 = 5 seconds and 2 = 10 seconds).
ATA Interface Reference Manual, Rev. C 59 5.6 Seagate standard power management commands Many Seagate drives designed for portable or laptop computers implement power management using both ATA-standard and Seagate-specific commands. These commands switch the drive between the four primary modes of operation as shown in Figure 9. Note.
60 ATA Interface Reference Manual, Rev. C A value of 0 in the Sector Count register means the drive is currently in, or entering, Idle mode. A value of FFH in the Sector Count register indicates that the drive is currently in, or entering, either Active mode or Standby mode. 5.6.4 Idle Immediate command This command (command code F8H) operates identically to the ATA-standard Idle Immediate command, but has a different command code. 5.6.
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62 ATA Interface Reference Manual, Rev. C Note. Power management commands for all other Seagate ATA-interface drives that support power management are described in Section 5.6. Power-save mode and the power-save timer are used in regard to the alternative Seagate power commands. These are functionally equivalent to Idle Mode and the idle timer, respectively. 5.7.1 Check Idle Mode command This command (command code FDH) reports whether the drive is currently in or making a transition to Idle mode.
ATA Interface Reference Manual, Rev. C 63 5.7.4 Enable/Disable Auto Standby command This command (command code E2H) enables and disables the automatic standby feature of the drive. When the drive receives this command, it sets BSY and makes a transition to Standby mode. Depending on the value placed in the Sector Count register, the drive either enables or disables the standby timer. The drive then clears BSY and generates an interrupt.
64 ATA Interface Reference Manual, Rev. C 5.7.8 Ready Immediate command When the drive receives this command (command codes E1H and F9H), it sets BSY and enters Active mode. If the drive is in Standby mode, the spinup routine is executed. (If the drive is in either Active mode or Idle mode, the spindle is already up to speed, and the spinup routine is skipped.) Then, the drive clears BSY and generates an interrupt. This interrupt is generated even if the drive is not fully in Active mode. 5.7.
ATA Interface Reference Manual, Rev. C 65 6.0 ATA Interface timing diagrams The following symbols are used in the timing specifications for the ATA interface. The host is responsible for providing cable deskewing for all signals originating from the controller. The drive provides cable deskewing for all signals originating from the host. Within these diagrams, all timing specifications are in nanoseconds (nsec), unless otherwise specified.
66 ATA Interface Reference Manual, Rev. C Address Valid *1 DIOR– /DIOW– Write Data Valid *2 Read Data Valid *2 IOCS16– T5 T7 T3 T1 T6 T4 T9 T2 T8 T0 *1 Drive Address consists of signals CS1FX–, CS3FX–, and DA2–DA0 *2 Data consists of DD0–DD15 (16-bit) or DD0–DD7 (8-bit) Figure 12.
ATA Interface Reference Manual, Rev. C 67 DIOR– /DIOW– IORDY TA TB Figure 13.
68 ATA Interface Reference Manual, Rev. C DMARQ DMACK– DIOR–/DIOW– Read DD0 –DD15 Write DD0 –DD15 TE TC TF TG TI TH TD TJ TO Figure 14.
ATA Interface Reference Manual, Rev. C 69 DMARQ DMACK– DIOR– DIOW– Read DD0 –DD15 Write DD0 –DD15 TG TH TJ TL TF TE TD TK TI TO Figure 15. Multiword DMA transfer timing Key to multiword DMA timing data (all times in nsec) Mode 0 Label Parameter Min. Max.
70 ATA Interface Reference Manual, Rev. C RESET– Drive 0 BSY (1) DASP– (2) (3) Control Registers Drive 1 BSY PDIAG– (3) DASP– Control Registers TN TP TM TQ TR TS Notes: 1. Drive 0 can set BSY= 0 if Drive 1 is not present 2. Drive 0 can use DASP– to indicate it is active if Drive 1 is not present 3. DASP– can be asserted to indicate that the drive is active Figure 16.
Seagate Technology, Inc. 920 Disc Drive, Scotts Valley, California 95066, USA Publication Number: 36111-001, Rev.