Datasheet

ManualsBrandsSeeed Studio ManualsDevelopment Boards & Kits6 Axis Accelerometer and Compass

This is information on a product in full production.

November 2013 DocID023312 Rev 2 1/52

LSM303D

Ultra-compact high-performance eCompass module:

3D accelerometer and 3D magnetometer

Datasheet - production data

Features

 3 magnetic field channels and 3 acceleration

channels

 ±2/±4/±8/±12 gauss magnetic full scale

 ±2/±4/±6/±8/±16 g linear acceleration full scale

 16-bit data output

 SPI / I

C serial interfaces

 Analog supply voltage 2.16 V to 3.6 V

 Power-down mode / low-power mode

 Programmable interrupt generators for free-

fall, motion detection and magnetic field

detection

 Embedded temperature sensor

 Embedded FIFO

 ECOPACK

, RoHS and “Green” compliant

Applications

 Tilt-compensated compasses

 Map rotation

 Position detection

 Motion-activated functions

 Free-fall detection

 Click/double-click recognition

 Pedometers

 Intelligent power saving for handheld devices

 Display orientation

 Gaming and virtual reality input devices

 Impact recognition and logging

 Vibration monitoring and compensation

Description

The LSM303D is a system-in-package featuring a

3D digital linear acceleration sensor and a 3D

digital magnetic sensor.

The LSM303D has linear acceleration full scales

of ±2g / ±4g / ±6g / ±8g / ±16g and a magnetic

field full scale of ±2 / ±4 / ±8 / ±12 gauss.

The LSM303D includes an I

C serial bus

interface that supports standard and fast mode

(100 kHz and 400 kHz) and SPI serial standard

interface.

The system can be configured to generate an

interrupt signal for free-fall, motion detection and

magnetic field detection. Thresholds and timing of

interrupt generators are programmable by the end

user.

Magnetic and accelerometer blocks can be

enabled or put into power-down mode separately.

The LSM303D is available in a plastic land grid

array package (LGA) and is guaranteed to

operate over an extended temperature range

from -40 °C to +85 °C.

LGA-16

(3x3x1 mm)

Table 1. Device summary

Part number

Temperature

range [°C]

Package Packaging

LSM303D -40 to +85 LGA-16 Tray

LSM303DTR -40 to +85 LGA-16

Tape and

reel

www.st.com

Summary of content (52 pages)

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LSM303D Ultra-compact high-performance eCompass module: 3D accelerometer and 3D magnetometer Datasheet - production data  Display orientation  Gaming and virtual reality input devices  Impact recognition and logging  Vibration monitoring and compensation Description LGA-16 (3x3x1 mm) The LSM303D is a system-in-package featuring a 3D digital linear acceleration sensor and a 3D digital magnetic sensor.
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Contents LSM303D Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Module specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Sensor characteristics . . . . . . . . . . .
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LSM303D Contents 5.5 6 High-current wiring effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.1 I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.1.1 6.2 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SPI bus interface . . . . . . . . . . .
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Contents LSM303D 8.22 CTRL6 (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 8.23 CTRL7 (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 8.24 STATUS_A (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8.25 OUT_X_L_A (28h), OUT_X_H_A (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . 40 8.26 OUT_Y_L_A (2Ah), OUT_Y_H_A (2Bh) . . . . . . . .
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LSM303D List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48.
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List of tables Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. Table 71. Table 72. Table 73. Table 74. Table 75. Table 76. Table 77. Table 78. Table 79. Table 80. Table 81. Table 82. Table 83. Table 84. Table 85. Table 86. Table 87. Table 88. Table 89. Table 90. Table 91. Table 92. Table 93. Table 94. Table 95. Table 96. Table 97.
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LSM303D List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . .
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Block diagram and pin description LSM303D 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram Sensing Block Sensing Interface Control Logic A/D converter X+ Y+ CHARGE AMPLIFIER Z+ I (a) + CS MUX - SCL/SPC DI SPI / I2C ZYX- SDA/SDI/SDO SDO/SA0 X+ INT1 CHARGE AMPLIFIER Y+ Z+ I (M) INT2 + MUX ZYX- INTERRUPT GEN. FIFO REFERENCE OFFSET CIRCUITS TRIMMING CIRCUITS CLOCK BUILT-IN SET/RESET TEMPERATURE SENSOR CIRCUITS AM12676V1 1.
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LSM303D Block diagram and pin description Table 2.
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Module specifications LSM303D 2 Module specifications 2.1 Sensor characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted (a). Table 3. Sensor characteristics Symbol Parameter Test conditions Min. Typ.(1) Max. Unit ±2 ±4 LA_FS Linear acceleration measurement range(2) ±6 g ±8 ±16 ±2 M_FS ±4 Magnetic measurement range ±8 gauss ±12 LA_So M_So Linear acceleration sensitivity Magnetic sensitivity Linear acceleration FS = ±2 g 0.061 Linear acceleration FS = ±4 g 0.
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LSM303D Module specifications Table 3. Sensor characteristics (continued) Symbol Parameter Min. Typ.(1) Test conditions M_CAS Magnetic cross-axis sensitivity Cross field = 0.5 gauss Applied = ±3 gauss M_EF Maximum exposed field No permanent effect on sensor performance M_DF Magnetic disturbance field Sensitivity starts to degrade. Automatic S/R pulse restores the sensitivity(5) LA_ST Top Linear acceleration self-test positive difference(6) Max.
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Module specifications 2.3 LSM303D Electrical characteristics @ Vdd = 2.5 V, T = 25 °C unless otherwise noted. Table 5. Electrical characteristics Symbol Test conditions Parameter Min. Vdd Supply voltage 2.16 Vdd_IO Module power supply for I/O 1.71 Idd eCompass(2) current consumption in normal mode(3) IddSL Current consumption in power-down mode(4) Top Operating temperature range LR setting CTRL5 (M_RES [1,0]) = 00b, see Table 45 -40 Typ.(1) 1.8 Max. Unit 3.6 V Vdd+0.
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LSM303D Module specifications 2.4 Communication interface characteristics 2.4.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 6. SPI slave timing values Value (1) Symbol Parameter Unit Min.
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Module specifications LSM303D Sensor I2C - inter-IC control interface 2.4.2 Subject to general operating conditions for Vdd and Top. Table 7. I2C slave timing values Symbol I2C standard mode (1) Parameter f(SCL) SCL clock frequency I2C fast mode (1) Min. Max. Min. Max. 0 100 0 400 tw(SCLL) SCL clock low time 4.7 1.3 tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 th(SDA) SDA data hold time 0 ns 0 0.
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LSM303D 2.5 Module specifications Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 8. Absolute maximum ratings Symbol Vdd Vdd_IO Vin Note: Ratings Maximum value Unit Supply voltage -0.3 to 4.
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Terminology 3 Terminology 3.1 Set/reset pulse LSM303D The set/reset pulse is an automatic operation performed before each magnetic acquisition cycle to recover the initial magnetization state of the sensor and therefore the linearity of the sensor itself. 3.2 Sensitivity 3.2.1 Linear acceleration sensor sensitivity Sensitivity describes the gain of the sensor and can be determined, for example, by applying 1 g acceleration to it.
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LSM303D Functionality 4 Functionality 4.1 Self-test The self-test allows checking the linear acceleration sensor functionality without moving the sensor. The self-test function is off when the self-test bit (AST) is programmed to ‘0‘. When the self-test bit is programmed to ‘1’, an actuation force is applied to the sensor, simulating a definite input acceleration.
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Functionality LSM303D Stream mode In Stream mode, data from X, Y and Z measurements are stored in the FIFO. A FIFO threshold interrupt can be enabled and set as in FIFO mode.The FIFO continues filling until it’s full. When full, the FIFO discards the older data as the new arrive. Stream-to-FIFO mode In Stream-to-FIFO mode, data from X, Y and Z measurements are stored in the FIFO.
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LSM303D 5 Application hints Application hints Figure 5. LSM303D electrical connections Vdd C1= 4.7µF C3= 10µF 16 Vdd_IO 14 1 C2=0.22µF 13 TOP VIEW INT 1 C4 = 100nF 9 5 SDO/SA0 SDA/SDI/SDO SCL/SPC INT 2 CS 8 6 GND Digital signal from/to signal controller. Signal levels are defined by proper selection of Vdd_IO AM12678V1 5.1 External capacitors The C1 and C2 external capacitors should be low SR value ceramic type construction (typ. recommended value 200 m).
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Application hints 5.3 LSM303D Digital Interface power supply This digital interface, dedicated to the linear acceleration and to the magnetic field signal, is capable of operating with a standard power supply (Vdd) or using a dedicated power supply (Vdd_IO). 5.4 Soldering information The LGA package is compliant with ECOPACK®, RoHS and “Green” standards. It is qualified for soldering heat resistance according to JEDEC J-STD-020. Leave “Pin 1 Indicator” unconnected during soldering.
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LSM303D 6 Digital interfaces Digital interfaces The registers embedded in the LSM303D may be accessed through both the I2C and SPI serial interfaces. The latter may be SW-configured to operate either in 3-wire or 4-wire interface mode. The serial interfaces are mapped onto the same pins. To select/exploit the I2C interface, the CS line must be tied high (i.e connected to Vdd_IO). Table 9.
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Digital interfaces 6.1.1 LSM303D I2C operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a high-to-low transition on the data line while the SCL line is held high. After this has been transmitted by the master, the bus is considered busy.
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LSM303D Digital interfaces Table 13. Transfer when master is writing multiple bytes to slave Master ST SAD + W SUB Slave SAK DATA DATA SAK SAK SP SAK Table 14. Transfer when master is receiving (reading) one byte of data from slave Master ST SAD + W Slave SUB SAK SR SAD + R SAK NMAK SAK SP DATA Table 15.
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Digital interfaces LSM303D Figure 6. Read and write protocol CS SPC SDI DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 RW MS AD5 AD4 AD3 AD2 AD1 AD0 SDO DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 AM10129V1 CS is the serial port enable and is controlled by the SPI master. It goes low at the start of the transmission and goes back high at the end. SPC is the serial port clock and it is controlled by the SPI master. It is stopped high when CS is high (no transmission).
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LSM303D 6.2.1 Digital interfaces SPI read Figure 7. SPI read protocol CS SPC SDI RW MS AD5 AD4 AD3 AD2 AD1 AD0 SDO DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 AM10130V1 The SPI read command is performed with 16 clock pulses. The multiple byte read command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: READ bit. The value is 1. bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in multiple reads. bit 2-7: address AD(5:0).
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Digital interfaces 6.2.2 LSM303D SPI write Figure 9. SPI write protocol CS SPC SDI D I7 D I6 D I5 D I4 DI3 DI2 DI1 DI0 RW MS AD5 AD 4 AD 3 AD2 AD 1 AD0 AM10132V1 The SPI write command is performed with 16 clock pulses. The multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit. The value is 0. bit 1: MS bit. When 0, do not increment address; when 1, increment address in multiple writing. bit 2 -7: address AD(5:0).
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LSM303D Digital interfaces Figure 11. SPI read protocol in 3-wire mode CS SPC SDI/O D O7 D O6 D O5 DO4 DO3 DO2 DO1 DO0 RW MS AD5 AD 4 AD 3 AD2 AD1 AD 0 AM10134V1 The SPI read command is performed with 16 clock pulses: bit 0: READ bit. The value is 1. bit 1: MS bit. When 0, does not increment the address; when 1, increments the address in multiple reads. bit 2-7: address AD(5:0). This is the address field of the indexed register. bit 8-15: data DO(7:0) (read mode).
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Output register mapping 7 LSM303D Output register mapping The table below provides a listing of the 8-bit registers embedded in the device and the corresponding addresses. Table 16.
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LSM303D Output register mapping Table 16.
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Register description 8 LSM303D Register description The device contains a set of registers which are used to control its behavior and to retrieve acceleration and magnetic data. The register address, consisting of 7 bits, is used to identify them and to write the data through the serial interface. 8.1 TEMP_OUT_L (05h), TEMP_OUT_H (06h) Temperature sensor data. Temperature data is stored as two’s complement data in 12-bit format, right-justified. Refer to Section 4.
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LSM303D 8.3 Register description OUT_X_L_M (08h), OUT_X_H_M (09h) X-axis magnetic data. The value is expressed in 16-bit as two’s complement. 8.4 OUT_Y_L_M (0Ah), OUT_Y_H_M (0Bh) Y-axis magnetic data. The value is expressed in 16-bit as two’s complement. 8.5 OUT_Z_L_M (0Ch), OUT_Z_H_M (0Dh) Z-axis magnetic data. The value is expressed in 16-bit as two’s complement. 8.6 WHO_AM_I (0Fh) Table 19. WHO_AM_I register 0 1 0 0 1 0 0 1 4D MIEN Device identification register. 8.
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Register description 8.8 LSM303D INT_SRC_M (13h) Table 22. INT_SRC_M register M_PTH_X M_PTH_Y M_PTH_Z M_NTH_X M_NTH_Y M_NTH_Z MROI M_PTH_X Magnetic value on X-axis exceeds the threshold on the positive side. Default value: 0. M_PTH_Y Magnetic value on Y-axis exceeds the threshold on the positive side. Default value: 0. M_PTH_Z Magnetic value on Z-axis exceeds the threshold on the positive side. Default value: 0. M_NTH_X Magnetic value on X-axis exceeds the threshold on the negative side.
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LSM303D 8.10 Register description OFFSET_X_L_M (16h), OFFSET_X_H_M (17h) Magnetic offset for X-axis. Default value: 0. The value is expressed in 16-bit as two’s complement. Table 26. OFFSET_X_L_M register OFF_X_7 OFF_X_6 OFF_X_5 OFF_X_4 OFF_X_3 OFF_X_2 OFF_X_1 OFF_X_0 OFF_X_15 OFF_X_14 OFF_X_13 OFF_X_12 OFF_X_11 OFF_X_10 OFF_X_9 OFF_X_8 Table 27. OFFSET_X_H_M register 8.11 OFFSET_Y_L_M (18h), OFFSET_Y_H_M (19h) Magnetic offset for Y-axis. Default value: 0.
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Register description 8.15 LSM303D REFERENCE_Z (1Eh) Reference value for high-pass filter for Z-axis acceleration data. 8.16 CTRL0 (1Fh) Table 32. CTRL0 register BOOT FIFO_EN FTH_EN 0(1) 0(1) HP_Click HPIS1 HPIS2 1. These bits must be set to ‘0’ for correct operation of the device. Table 33. CTRL0 register description 8.17 BOOT Reboot memory content. Default value: 0 (0: normal mode; 1: reboot memory content) FIFO_EN FIFO enable.
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LSM303D Register description AODR [3:0] is used to set power mode and ODR selection. In the following table bit selection of AODR [3:0] for all frequencies is shown. Table 36. Acceleration data rate configuration AODR3 8.18 AODR2 AODR1 AODR0 Power mode and ODR selection 0 0 0 0 Power-down mode 0 0 0 1 3.125 Hz 0 0 1 0 6.25 Hz 0 0 1 1 12.
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Register description LSM303D Table 39. Acceleration anti-alias filter bandwidth ABW1 ABW0 Anti-alias filter bandwidth 1 0 362 Hz 1 1 50 Hz Table 40. Acceleration full-scale selection AFS2 8.19 AFS1 AFS0 Acceleration full scale 0 0 0 ±2 g 0 0 1 ±4 g 0 1 0 ±6 g 0 1 1 ±8 g 1 0 0 ±16 g CTRL3 (22h) Table 41. CTRL3 register INT1 _BOOT INT1 _Click INT1 _IG1 INT1 _IG2 INT1 _IGM INT1 INT1 INT1 _DRDY_A _DRDY_M _EMPTY Table 42.
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LSM303D 8.20 Register description CTRL4 (23h) Table 43. CTRL4 register INT2 _Click INT2 _INT1 INT2 _INT2 INT2 _INTM INT2 _DRDY_A INT2 _DRDY_M INT2 _Overrun INT2 _FTH Table 44. CTRL4 register description 8.21 INT2 _Click Click generator interrupt on INT2. Default value: 0 (0: disable; 1: enable) INT2 _IG1 Inertial interrupt generator 1 on INT2. Default value: 0 (0: disable; 1: enable) INT2 _IG2 Inertial interrupt generator 2 on INT2.
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Register description LSM303D Table 47. Magnetic data rate configuration MODR2 MODR1 MODR0 ODR selection 0 0 0 3.125 Hz 0 0 1 6.25 Hz 0 1 0 12.5 Hz 0 1 1 25 Hz 1 0 0 50 Hz 1 0 1 100 Hz(1) 1 1 0 Do not use 1 1 1 Reserved 1. Available only for accelerometer ODR > 50 Hz or accelerometer in power-down mode (refer to Table 36, AODR setting). 8.22 CTRL6 (25h) Table 48. CTRL6 register 0(1) MFS1 MFS0 0(1) 0(1) 0(1) 0(1) 0(1) MD1 MD0 1.
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LSM303D Register description Table 52. CTRL7 register description AHPM[1:0] High-pass filter mode selection for acceleration data. Default value: 00 Refer to Table 53 AFDS Filtered acceleration data selection. Default value: 0 (0: internal filter bypassed; 1: data from internal filter sent to output register and FIFO) T_ONLY Temperature sensor only mode. Default value: 0 If this bit is set to ‘1’, the temperature sensor is on while the magnetic sensor is off. MLP Magnetic data low-power mode.
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Register description LSM303D Table 56. STATUS_A register description ZYXAOR Acceleration X, Y and Z-axis data overrun. Default value: 0 (0: no overrun has occurred; 1: a new set of data has overwritten the previous data) ZAOR Acceleration Z-axis data overrun. Default value: 0 (0: no overrun has occurred; 1: new data for the Z-axis has overwritten the previous data) YAOR Acceleration Y-axis data overrun.
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LSM303D Register description Table 59. FIFO mode configuration FM2 FM1 FM0 FIFO mode 0 0 0 Bypass mode 0 0 1 FIFO mode 0 1 0 Stream mode 0 1 1 Stream-to-FIFO mode 1 0 0 Bypass-to-Stream mode Interrupt generator 2 can change the FIFO mode. 8.29 FIFO_SRC (2Fh) FiFO status register. Table 60. FIFO_SRC register FTH OVRN EMPTY FSS4 FSS3 FSS2 FSS1 FSS0 Table 61. FIFO_SRC register description 8.30 FTH FIFO threshold status.
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Register description LSM303D Table 63. IG_CFG1 register description AOI And/Or combination of interrupt events. Default value: 0. Refer to Table 64 6D 6-direction detection function enabled. Default value: 0. Refer to Table 64 ZHIE/ ZUPE Enable interrupt generation on Z high event or on direction recognition. Default value: 0 (0: disable interrupt request; 1: enable interrupt request) ZLIE/ ZDOWNE Enable interrupt generation on Z low event or on direction recognition.
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LSM303D Register description Table 66. IG_SRC1 register description IA Interrupt status. Default value: 0 (0: no interrupt has been generated; 1: one or more interrupts have been generated) ZH Z high. Default value: 0 (0: no interrupt; 1: Z high event has occurred) ZL Z low. Default value: 0 (0: no interrupt; 1: Z low event has occurred) YH Y high. Default value: 0 (0: no interrupt; 1: Y high event has occurred) YL Y low.
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Register description 8.34 LSM303D IG_CFG2 (34h) This register contains the settings for the inertial interrupt generator 2. Table 71. IG_CFG2 register AOI 6D ZHIE/ ZUPE ZLIE/ YHIE/ ZDOWNE YUPE YLIE/ XHIE/ YDOWNE XUPE XLIE/ XDOWNE Table 72. IG_CFG2 register description AOI And/Or combination of interrupt events. Default value: 0. Refer to Table 73 6D 6-direction detection function enabled. Default value: 0.
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LSM303D 8.35 Register description IG_SRC2 (35h) This register contains the status for the inertial interrupt generator 2. Table 74. IG_SRC2 register 0 IA ZH ZL YH YL XH XL Table 75. IG_SRC2 register description IA Interrupt generator 2 status. Default value: 0 (0: no interrupt has been generated; 1: one or more interrupts have been generated) ZH Z high. Default value: 0 (0: no interrupt; 1: Z high event has occurred) ZL Z low.
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Register description LSM303D Table 79. IG_DUR2 register description D6 - D0 Duration value. Default value: 000 0000 The D6 - D0 bits set the minimum duration of the interrupt 2 event to be recognized. Duration steps and maximum values depend on the ODR chosen. 8.38 CLICK_CFG (38h) Table 80. CLICK_CFG register -- -- ZD ZS YD YS XD XS Table 81. CLICK_CFG register description 46/52 ZD Enable interrupt double-click on Z-axis.
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LSM303D 8.39 Register description CLICK_SRC (39h) Table 82. CLICK_SRC register -- IA DClick SClick Sign Z Y X Table 83. CLICK_SRC register description 8.40 IA Interrupt active. Default value: 0 (0: no interrupt has been generated; 1: one or more interrupts have been generated) DClick Double-click enable. Default value: 0 (0: double-click detection disable; 1: double-click detection enable) SClick Single-click enable.
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Register description 8.42 LSM303D TIME_LATENCY (3Ch) Table 88. TIME_LATENCY register TLA7 TLA6 TLA5 TLA4 TLA3 TLA2 TLA1 TLA0 Table 89. TIME_LATENCY register description TLA[7:0] 8.43 Double-click time latency. Default value: 0000 0000 TIME_WINDOW (3Dh) Table 90. TIME_WINDOW register TW7 TW6 TW5 TW4 TW3 TW2 TW1 TW0 Table 91. TIME_WINDOW register description TW[7:0] 8.44 Double-click time window ACT_THS (3Eh) Table 92.
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LSM303D 9 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
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Package information LSM303D Table 96. LGA 3x3x1.0 16L mechanical data mm Dim. Min. Typ. A1 Max. 1 A2 0.785 A3 0.200 D1 2.850 3.000 3.150 E1 2.850 3.000 3.150 L1 1.000 1.060 L2 2.000 2.060 N1 0.500 N2 1.000 M 0.040 0.100 P1 0.875 P2 1.275 T1 0.290 0.350 0.410 T2 0.190 0.250 0.310 d 0.150 k 0.050 Figure 12. LGA 3x3x1.
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LSM303D 10 Revision history Revision history Table 97.
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LSM303D Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.