Datasheet

Output register mapping LSM303D
28/52 DocID023312 Rev 2
7 Output register mapping
The table below provides a listing of the 8-bit registers embedded in the device and the
corresponding addresses.
Table 16. Register address map
Name Type
Register address
Default Comment
Hex Binary
Reserved -- 00-04 -- -- Reserved
TEMP_OUT_L r 05 000 0101 Output
TEMP_OUT_H r 06 000 0110 Output
STATUS_M r 07 000 0111 Output
OUT_X_L_M r 08 000 1000 Output
OUT_X_H_M r 09 000 1001 Output
OUT_Y_L_M r 0A 000 1010 Output
OUT_Y_H_M r 0B 000 1011 Output
OUT_Z_L_M r 0C 000 1100 Output
OUT_Z_H_M r 0D 000 1101 Output
Reserved -- 0E 000 1110 -- Reserved
WHO_AM_I r 0F 000 1111 01001001
Reserved -- 10-11 -- -- Reserved
INT_CTRL_M rw 12 001 0010 11101000
INT_SRC_M r 13 001 0011 Output
INT_THS_L_M rw 14 001 0100 00000000
INT_THS_H_M rw 15 001 0101 00000000
OFFSET_X_L_M rw 16 001 0110 00000000
OFFSET_X_H_M rw 17 001 0111 00000000
OFFSET_Y_L_M rw 18 001 01000 00000000
OFFSET_Y_H_M rw 19 001 01001 00000000
OFFSET_Z_L_M rw 1A 001 01010 00000000
OFFSET_Z_H_M rw 1B 001 01011 00000000
REFERENCE_X rw 1C 001 01100 00000000
REFERENCE_Y rw 1D 001 01101 00000000
REFERENCE_Z rw 1E 001 01110 00000000
CTRL0 rw 1F 001 1111 00000000
CTRL1 rw 20 010 0000 00000111
CTRL2 rw 21 010 0001 00000000