Datasheet

Sensors
NXP Semiconductors 11
MMA8452Q
4 System Modes (SYSMOD)
Figure 6. MMA8452Q mode transition diagram
All register contents are preserved when transitioning from active to standby mode. Some registers are reset when transitioning
from standby to active. These are all noted in the device memory map register table. The sleep and wake modes are active
modes. For more information on how to use the sleep and wake modes and how to transition between these modes, please refer
to the functionality section of this document.
Table 7. Mode of operation description
Mode
I
2
C bus state
VDD Function description
OFF
Powered down
<1.8V
VDDIO Can be > VDD
• The device is powered off.
• All analog and digital blocks are shutdown.
•I
2
C bus inhibited.
Standby
I
2
C communication is possible
>1.8V
• Only digital blocks are enabled.
analog subsystem is disabled.
• Internal clocks disabled.
• Registers accessible for read/write.
• Device is configured in standby mode.
Active
(wake/sleep)
I
2
C communication is possible
>1.8V
• All blocks are enabled (digital, analog).
OFF
WakeStandby
OFF
Active
SYSMOD = 00
SYSMOD = 10
SYSMOD = 01
Auto-sleep/wake
Condition
VDD > 1.8 V
VDD < 1.8 V
CTRL_REG1
Active bit = 1
CTRL_REG1
Active bit = 0
CTRL_REG1
Active bit = 0