Datasheet
Sensors
26 NXP Semiconductors
MMA8452Q
0x12: Portrait/landscape debounce counter
This register sets the debounce count for the orientation state transition. The minimum debounce latency is determined by the
data rate set by the product of the selected system ODR and PL_COUNT registers. Any transition from wake to sleep or vice
versa resets the internal landscape/portrait debounce counter. Note: The debounce counter weighting (time step) changes based
on the ODR and the oversampling mode. Table 22 explains the time step value for all sample rates and all oversampling modes.
0x13: PL_BF_ZCOMP back/front and Z compensation register
The Z-lock angle compensation is set to 29°. The back to front trip angle is set to ±75°.
Note: All angles are accurate to ±2°.
0x14: PL_THS_REG portrait/landscape threshold and hysteresis register
This register represents the portrait to landscape trip threshold.
0x12: PL_COUNT register (read/write)
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
DBNCE[7] DBNCE[6] DBNCE[5] DBNCE[4] DBNCE[3] DBNCE[2] DBNCE[1] DBNCE[0]
Table 21.
PL_COUNT description
Field Description
DBCNE[7:0]
Debounce count value. Default value: 0000_0000.
Table 22.
PL_COUNT relationship with the ODR
ODR (Hz)
Max time range (s) Time step (ms)
Normal LPLN HighRes LP Normal LPLN HighRes LP
800 0.319 0.319 0.319 0.319 1.25 1.25 1.25 1.25
400 0.638 0.638 0.638 0.638 2.5 2.5 2.5 2.5
200 1.28 1.28 0.638 1.28 5 5 2.5 5
100 2.55 2.55 0.638 2.55 10 10 2.5 10
50 5.1 5.1 0.638 5.1 20 20 2.5 20
12.5 5.1 20.4 0.638 20.4 20 80 2.5 80
6.25 5.1 20.4 0.638 40.8 20 80 2.5 160
1.56 5.1 20.4 0.638 40.8 20 80 2.5 160
0x13: PL_BF_ZCOMP register (read only)
Bit
7
Bit
6
Bit
5
Bit 4 Bit
3
Bit
2
Bit
1
Bit
0
BKFR[1] BKFR[0] 0 0 0 ZLOCK[2] ZLOCK[1] ZLOCK[0]
Table 23. PL_BF_ZCOMP description
Field Description
BKFR[1:0]
Back front trip angle fixed threshold = 01 which is
≥ ±75°.
ZLOCK[2:0]
Z-lock angle fixed threshold = 100 which is 29°.
0x14: PL_THS_REG register (read only)
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
PL_THS[4] PL_THS[3] PL_THS[2] PL_THS[1] PL_THS[0] HYS[2] HYS[1] HYS[0]