User Manual

148
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
not be visible on the port pin unless the data direction for the pin is set to output. The waveform generated will have
a maximum frequency of f
OC2A
= f
clk_I/O
/2 when OCR2A is set to zero (0x00). The waveform frequency is defined by
the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
As for the Normal mode of operation, the
TOV2 Flag is set in the same timer clock cycle that the counter counts
from MAX to 0x00.
18.7.3 Fast PWM Mode
The fast Pulse Width Modulation or fast PWM mode (WGM22:0 = 3 or 7) provides a high frequency PWM wave-
form generation option. The fast PWM differs from the other PWM option by its single-slope operation. The counter
counts from BOTTOM to TOP then restarts from BOTTOM. TOP is defined as 0xFF when WGM2:0 = 3, and
OCR2A when MGM2:0 = 7. In non-inverting Compare Output mode, the Output Compare (OC2x) is cleared on the
compare match between TCNT2 and OCR2x, and set at BOTTOM. In inverting Compare Output mode, the output
is set on compare match and cleared at BOTTOM. Due to the single-slope operation, the operating frequency of
the fast PWM mode can be twice as high as the phase correct PWM mode that uses dual-slope operation. This
high frequency makes the fast PWM mode well suited for power regulation, rectification, and DAC applications.
High frequency allows physically small sized external components (coils, capacitors), and therefore reduces total
system cost.
In fast PWM mode, the counter is incremented until the counter value matches the TOP value. The counter is then
cleared at the following timer clock cycle. The timing diagram for the fast PWM mode is shown in Figure 18-6. The
TCNT2 value is in the timing diagram shown as a histogram for illustrating the single-slope operation. The diagram
includes non-inverted and inverted PWM outputs. The small horizontal line marks on the TCNT2 slopes represent
compare matches between OCR2x and TCNT2.
Figure 18-6. Fast PWM Mode, Timing Diagram
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches TOP. If the interrupt is enabled, the
interrupt handler routine can be used for updating the compare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC2x pin. Setting the
COM2x1:0 bits to two will produce a non-inverted PWM and an inverted PWM output can be generated by setting
f
OCnx
f
clk_I/O
2 N 1 OCRnx+
--------------------------------------------------=
TCNTn
OCRnx Update and
TOVn Interrupt Flag Set
1
Period
2 3
OCnx
OCnx
(COMnx1:0 = 2)
(COMnx1:0 = 3)
OCRnx Interrupt Flag Set
4 5 6 7