User Manual

209
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
22. 2-wire Serial Interface
22.1 Features
• Simple Yet Powerful and Flexible Communication Interface, only two Bus Lines Needed
• Both Master and Slave Operation Supported
• Device can Operate as Transmitter or Receiver
• 7-bit Address Space Allows up to 128 Different Slave Addresses
• Multi-master Arbitration Support
• Up to 400kHz Data Transfer Speed
• Slew-rate Limited Output Drivers
• Noise Suppression Circuitry Rejects Spikes on Bus Lines
• Fully Programmable Slave Address with General Call Support
• Address Recognition Causes Wake-up When AVR is in Sleep Mode
• Compatible with Philips’ I
2
C protocol
22.2 2-wire Serial Interface Bus Definition
The 2-wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The TWI protocol allows
the systems designer to interconnect up to 128 different devices using only two bi-directional bus lines, one for
clock (SCL) and one for data (SDA). The only external hardware needed to implement the bus is a single pull-up
resistor for each of the TWI bus lines. All devices connected to the bus have individual addresses, and mecha-
nisms for resolving bus contention are inherent in the TWI protocol.
Figure 22-1. TWI Bus Interconnection
Device 1
Device 2
Device 3
Device n
SDA
SCL
........
R1 R2
V
CC