User Manual

238
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
Figure 22-22. TWI Address Match Logic, Block Diagram
• Bit 0 – Reserved
This bit is an unused bit in the ATmega48A/PA/88A/PA/168A/PA/328/P, and will always read as zero.
Address
Match
Address Bit Comparator 0
Address Bit Comparator 6..1
TWAR0
TWAMR0
Address
Bit 0