User Manual

258
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
• Bit 5:0 – ADC5D...ADC0D: ADC5...0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the
ADC5...0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power
consumption in the digital input buffer.
Note that ADC pins ADC7 and ADC6 do not have digital input buffers, and therefore do not require Digital Input
Disable bits.