User Manual

27
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
9.1.4 Asynchronous Timer Clock – clk
ASY
The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly from an external
clock or an external 32kHz clock crystal. The dedicated clock domain allows using this Timer/Counter as a real-
time counter even when the device is in sleep mode.
9.1.5 ADC Clock – clk
ADC
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks in order to reduce
noise generated by digital circuitry. This gives more accurate ADC conversion results.
9.2 Clock Sources
The device has the following clock source options, selectable by Flash Fuse bits as shown below. The clock from
the selected source is input to the AVR clock generator, and routed to the appropriate modules.
Note: 1. For all fuses “1” means unprogrammed while “0” means programmed.
9.2.1 Default Clock Source
The device is shipped with internal RC oscillator at 8.0MHz and with the fuse CKDIV8 programmed, resulting in
1.0MHz system clock. The startup time is set to maximum and time-out period enabled. (CKSEL = "0010", SUT =
"10", CKDIV8 = "0"). The default setting ensures that all users can make their desired clock source setting using
any available programming interface.
9.2.2 Clock Startup Sequence
Any clock source needs a sufficient V
CC
to start oscillating and a minimum number of oscillating cycles before it
can be considered stable.
To ensure sufficient V
CC
, the device issues an internal reset with a time-out delay (t
TOUT
) after the device reset is
released by all other reset sources. ”System Control and Reset” on page 46 describes the start conditions for the
internal reset. The delay (t
TOUT
) is timed from the Watchdog Oscillator and the number of cycles in the delay is set
by the SUTx and CKSELx fuse bits. The selectable delays are shown in Table 9-2. The frequency of the Watchdog
Oscillator is voltage dependent as shown in ”Typical Characteristics” on page 318.
Main purpose of the delay is to keep the AVR in reset until it is supplied with minimum V
CC
. The delay will not mon-
itor the actual voltage and it will be required to select a delay longer than the V
CC
rise time. If this is not possible, an
Table 9-1. Device Clocking Options Select
(1)
Device Clocking Option CKSEL3...0
Low Power Crystal Oscillator 1111 - 1000
Full Swing Crystal Oscillator 0111 - 0110
Low Frequency Crystal Oscillator 0101 - 0100
Internal 128kHz RC Oscillator 0011
Calibrated Internal RC Oscillator 0010
External Clock 0000
Reserved 0001
Table 9-2. Number of Watchdog Oscillator Cycles
Typ Time-out (V
CC
= 5.0V) Typ Time-out (V
CC
= 3.0V) Number of Cycles
0ms 0ms 0
4.1ms 4.3ms 512
65ms 69ms 8K (8,192)