User Manual

38
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
10. Power Management and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving power. The AVR
provides various sleep modes allowing the user to tailor the power consumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during the sleep periods.
To further save power, it is possible to disable the BOD in some sleep modes. See ”BOD Disable(1)” on page 39
for more details.
10.1 Sleep Modes
Figure 9-1 on page 26 presents the different clock systems in the ATmega48A/PA/88A/PA/168A/PA/328/P, and
their distribution. The figure is helpful in selecting an appropriate sleep mode. Table 10-1 shows the different sleep
modes, their wake up sources BOD disable ability.
(1)
Note: 1. BOD disable is only available for ATmega48PA/88PA/168PA/328P.
Notes: 1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT1 and INT0, only level interrupt.
To enter any of the six sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP instruction must
be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which sleep mode (Idle, ADC Noise
Reduction, Power-down, Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction.
See Table 10-2 on page 43 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for
four cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the instruc-
tion following SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up from
sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.
Table 10-1. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains Oscillators Wake-up Sources
Software BOD Disable
Sleep Mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
ASY
Main Clock Source Enabled Timer Oscillator Enabled INT1, INT0 and Pin Change TWI Address Match Timer2 SPM/EEPROM Ready ADC WDT Other I/O
Idle XXX X X
(2)
X X X X XXX
ADC Noise
Reduction
XX X X
(2)
X
(3)
XX
(2)
XXX
Power-down X
(3)
XXX
Power-save X X
(2)
X
(3)
XX X X
Standby
(1)
XX
(3)
XXX
Extended
Standby
X
(2)
XX
(2)
X
(3)
XX X X