User Manual
39
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
8271E–AVR–07/2012
10.2 BOD Disable
(1)
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses - see Table 28-7 on page 287 and onwards,
the BOD is actively monitoring the power supply voltage during a sleep period. To save power, it is possible to dis-
able the BOD by software for some of the sleep modes, see Table 10-1 on page 38. The sleep mode power
consumption will then be at the same level as when BOD is globally disabled by fuses. If BOD is disabled in soft-
ware, the BOD function is turned off immediately after entering the sleep mode. Upon wake-up from sleep, BOD is
automatically enabled again. This ensures safe operation in case the V
CC
level has dropped during the sleep
period.
When the BOD has been disabled, the wake-up time from sleep mode will be approximately 60 µs to ensure that
the BOD is working correctly before the MCU continues executing code.
BOD disable is controlled by bit 6, BODS (BOD Sleep) in the control register MCUCR, see ”MCUCR – MCU Con-
trol Register” on page 44. Writing this bit to one turns off the BOD in relevant sleep modes, while a zero in this bit
keeps BOD active. Default setting keeps BOD active, i.e. BODS set to zero.
Writing to the BODS bit is controlled by a timed sequence and an enable bit, see ”MCUCR – MCU Control Regis-
ter” on page 44.
Note: 1. BOD disable only available in picoPower devices ATmega48PA/88PA/168PA/328P
10.3 Idle Mode
When the SM2...0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle mode, stopping the
CPU but allowing the SPI, USART, Analog Comparator, ADC, 2-wire Serial Interface, Timer/Counters, Watchdog,
and the interrupt system to continue operating. This sleep mode basically halts clk
CPU
and clk
FLASH
, while allowing
the other clocks to run.
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal ones like the Timer
Overflow and USART Transmit Complete interrupts. If wake-up from the Analog Comparator interrupt is not
required, the Analog Comparator can be powered down by setting the ACD bit in the Analog Comparator Control
and Status Register – ACSR. This will reduce power consumption in Idle mode. If the ADC is enabled, a conver-
sion starts automatically when this mode is entered.
10.4 ADC Noise Reduction Mode
When the SM2...0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC Noise Reduction
mode, stopping the CPU but allowing the ADC, the external interrupts, the 2-wire Serial Interface address watch,
Timer/Counter2
(1)
, and the Watchdog to continue operating (if enabled). This sleep mode basically halts clk
I/O
, clk-
CPU
, and clk
FLASH
, while allowing the other clocks to run.
This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is
enabled, a conversion starts automatically when this mode is entered. Apart from the ADC Conversion Complete
interrupt, only an External Reset, a Watchdog System Reset, a Watchdog Interrupt, a Brown-out Reset, a 2-wire
Serial Interface address match, a Timer/Counter2 interrupt, an SPM/EEPROM ready interrupt, an external level
interrupt on INT0 or INT1 or a pin change interrupt can wake up the MCU from ADC Noise Reduction mode.
Note: 1. Timer/Counter2 will only keep running in asynchronous mode, see ”8-bit Timer/Counter2 with PWM and Asynchro-
nous Operation” on page 142 for details.
10.5 Power-down Mode
When the SM2...0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-down mode. In this
mode, the external Oscillator is stopped, while the external interrupts, the 2-wire Serial Interface address watch,
and the Watchdog continue operating (if enabled). Only an External Reset, a Watchdog System Reset, a Watch-
dog Interrupt, a Brown-out Reset, a 2-wire Serial Interface address match, an external level interrupt on INT0 or