User Manual

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The Bumblebee kernel does not have a power domain inside, and SoC system
integrators can divide the power domain and cross-power domain processing according
to the Bumblebee kernel hierarchy.
2.3. Introduction to the Bumblebee Kernel Interface
The Bumblebee kernel contains the following types of interfaces:
Clock and reset interface
Debug interface
External interrupt interface
Bus interface, including the following interfaces:
ILM Master Interface: An interface to access an external ILM.
DLM Master Interface: An interface that accesses an external DLM.
PPI Priperhal Interface: An interface that accesses an external private
peripheral bus.
MEM interface (System Memory Interface): The interface to access the system
bus.
Other function interface
This document is not extensively described in detail on interface signals.
2.4. Bumblebee kernel address space allocation
Please refer to the data sheet of the specific MCU chip for the address space of the
Bumblebee kernel.
2.5. Privileged mode of the Bumblebee kernel
The Bumblebee kernel supports two Privilege Modes: Machine Mode and User Mode.See
the Bumblebee Kernel Instruction Architecture Handbook for more information on