User Manual

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The above devices belong to the processor core and are accessed by using the memory
address addressing mode. For details on the specific address range allocation, see the 2.4
Section.
2.8. Physical storage protection for the Bumblebee kernel
Since the Bumblebee core is a low-power core for the microcontroller domain, it does
not support virtual address management units.
(Memory Management Unit), so all address access operations are physical addresses
used.In order to isolate and protect permissions based on different memory physical
address ranges and different Privilege Modes, the RISC-V architecture standard
defines a physical memory protection mechanism (Physical Memory Protection (PMP) unit.
Note: The Bumblebee kernel does not support PMP units.
2.9. Bumblebee kernel debugging mechanism
The Bumblebee kernel supports the standard JTAG debug interface and the proven
interactive debugging tool GDB.note:
 The number of hardware breakpoints supported by the Bumblebee kernel is
four.Hardware breakpoints are primarily used to set breakpoints to read-only
intervals such as Flash.
The Bumblebee kernel defines an input signal, and i_dbg_stop can be controlled by the
value of its input signal:
 If the value of the i_dbg_stop signal is 1, the debug function of the processor core is turned off.
 If the value of the i_dbg_stop signal is 0, the debug function of the processor core is working
properly.
2.10. Bumblebee kernel interrupt and exception mechanism